Intel altera Cyclone V SoC - The DDR3 Tab

5.3.5. The DDR3 Tab
The DDR3 tab allows you to read and write the DDR3 memory on your board.
Figure 12. The DDR3 Tab
The following sections describe the controls on the DDR3 tab.
Start
The Start control initiates DDR3 memory transaction performance analysis.
Stop
The Stop control terminates transaction performance analysis.
Performance Indicators
These controls display current transaction performance analysis information collected
since you last clicked Start:
• Write, Read, and Total performance bars: Show the percentage of maximum
theoretical data rate that the requested transactions are able to achieve.
• Write (MBps), Read (MBps), and Total (MBps): Show the number of bytes of
data analyzed per second. The data bus is 72 bits wide and the frequency is 400
MHz double data rate (800 Mbps per pin), equating to a theoretical maximum
bandwidth of 3200 Megabits per second or 400 MBps.
5. Board Test System
830285 | 2024.10.07
Cyclone
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V SoC Development Kit User Guide
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