Intel altera Cyclone V SoC - Page 48

Perform the following steps to program a user design to the flash device in the
Quartus Prime Programmer:
Note: The following flash writing procedure blinks the SEL 2, 1, and 0 LEDs and does not
support the Power Monitor, Clock Control, or other logic functions.
1. On the Tools menu in the Quartus Prime software, click Programmer.
2. In the Programmer window, click Auto-Detect.
Note: If you do not see Intel FPGA Download Cable or the board's embedded Intel
FPGA Download Cable II listed next to Hardware Setup, refer to the Cable
and Adapter Drivers Information webpage in the Intel website.
3.
Click Add File and open cycloneVSX_5csxfc6df31_soc\factory_recovery
\max2_PFL_writer.pof.
4.
Turn on the Program/Configure option for the .pof file.
5. Click Start to download the selected configuration file to the MAX V CPLD.
Configuration is complete when the progress bar reaches 100%.
6. Click Auto Detect and a flash device should show up attached to the MAX V in the
main window.
7. Double-click the graphic of the flash device in the device chain pane to display the
Device's Properties dialog box.
8.
Select the flash image .pof file generated from the Quartus Prime Convert
Programming Files dialog box. The default file name is output_file.pof.
9.
After the flash image .pof is attached in theQuartus Prime Programmer, turn on
Page_1 and Option Bits. (Page_0 is reserved for the GSRD factory design.)
10. Click Start.
11. After the flash writing process has completed, power cycle the board and look for
the MAX CONF DONE LED to turn ON if the writing process is successful.
12. Altera recommends that you return to the MAX V System Controller factory design
after completing the flash writing. To do so, program the MAX V with
cycloneVSX_5csxfc6df31_soc\factory_recovery\max<version>.pof. For
more information refer to the Restoring the MAX V CPLD to the Factory Settings
section.
For more information on programming flash memory, refer to the Parallel Flash
Loader Intel FPGA IP User Guide and Using FPGA-Based Parallel Flash Loader with
the Quartus Prime Software.
Related Information
• Cyclone V SoC Development Board Reference Manual
• Restoring the MAX V CPLD to the Factory Setting on page 22
• Parallel Flash Loader Intel FPGA IP User Guide
• AN 478: Using FPGA-Based Parallel Flash Loader with the Quartus Prime Software
A.2.1.3. Converting .sof Files to a .pof
To generate a flash programming file, you must open the Quartus Prime software and
convert the .sof files to .pof.
A. Development Kit Components
830285 | 2024.10.07
Cyclone
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V SoC Development Kit User Guide
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