Intel Cyclone V User Manual

In summary, the process consists of following steps:
1. Select the desired device
2. Use the GHRD as a hardware project starting point
3. Select the operating slystem: bare metal, Linux or partner real-time operating
system
4. Write and/or update end application and/or drivers
5.1.1.1. Golden Hardware Reference Design
The Golden Hardware Reference Design is an Intel Quartus Prime project that contains
a full HPS design for the Cyclone V SoC / Arria V SoC Development Kit. The GHRD has
connections to a boot source, SDRAM memory and other peripherals on the
development board.
For every new released version of SoC EDS, the GHRD is included in the SoC EDS
tools. The GHRD is regression tested with every major release of the Intel Quartus
Prime Design Software and includes the latest bug fixes for known hardware issues.
The GHRD serves as a known good configuration of an SoC FPGA hardware system.
5. Embedded Software Design Guidelines for SoC FPGAs
AN-796 | 2018.06.18
AN 796: Cyclone V and Arria V SoC Device Design Guidelines
50

Intel Cyclone V Specifications

General

FPGA Family	Cyclone V
Logic Elements	25K to 301K
Transceivers	Up to 12
Processor	Dual-core ARM Cortex-A9
Process Technology	28 nm
Embedded Memory	M10K blocks
Operating Temperature	0°C to +85°C (Commercial), -40°C to +100°C (Industrial), -40°C to +125°C (Automotive)
Power Consumption	Varies by configuration and usage
Maximum User I/O	Up to 524