Intel
®
Core
TM
2 Duo E6400, E4300, and Intel
®
Pentium
®
Dual-Core E2160 Processor
October 2007 TDG
Order Number: 315279 -003US 41
Intel® Quiet System Technology (Intel® QST)—Intel
®
Core
TM
2 Duo E6400, E4300, and Intel
®
Pentium
®
Dual-Core E2160 Processor
6.2 Board and System Implementation of Intel® QST
To implement, the board must be configured as shown in Figure 15 and listed below:
• ME system (S0-S1) with Controller Link connected and powered
• DRAM with Channel A DIMM 0 installed and 2MB reserved for Intel® QST FW
execution
• SPI Flash with sufficient space for the Intel® QST Firmware
• SST-based thermal sensors to provide board thermal data for Intel® QST
algorithms
• Intel® QST firmware
Note: Simple Serial Transport (SST) is a single wire bus that is included in the ICH8 to provide
additional thermal and voltage sensing capability to the Manageability Engine (ME).
Figure 16 shows the major connections for a typical implementation that can support
processors with Digital thermal sensor or a thermal diode. In this configuration, a SST
Thermal Sensor has been added to read the on-die thermal diode that is in all of the
processors in the 775-land LGA packages shipped before the Intel® Core™2 Duo
processor. With the proper configuration information, the ME can be accommodate
inputs from PECI or SST for the processor socket. Additional SST sensors can be added
to monitor system thermal conditions (refer to Appendix E for BTX recommendations
for placement).
Figure 15. Intel® QST Platform Requirements
Processor
ME
SPI
Flash
Intel®
ICH8
DRAM
Controller Link
DRAM
FSC
Control
SPI
SST
Sensor
Intel® (G)MCH
ME
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