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Details the division of SPI flash into up to five regions in descriptor mode, listing common regions like BIOS, ME, and GbE.
Outlines the essential SPI flash requirements for Broadwell PCH-LP family, including memory capacity and I/O types.
Specifies the requirements for SPI flash devices used for BIOS, covering erase size, mode support, and status register behavior.
Lists requirements for SPI flash used by Intel ME FW, including BIOS requirements and specific features.
Describes the data structure of the Flash Descriptor on the SPI device, detailing its various sections and their purpose.
Explains the signature and map registers within the Flash Descriptor, crucial for validating descriptor mode.
Details how the Flash Descriptor defines different regions of the NVM image on the SPI flash.
Covers the master section, defining hardware security settings and read/write permissions for flash regions.
Provides a recommended sequence for unlocking SPI flash device protection on Broadwell PCH-LP platforms.
Recommends using protected range registers to lock down specific flash regions, especially Intel ME Ignition FW.
Discusses methods to disable Intel ME for in-system flash programming and debugging purposes.
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General