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Intel PCH-LP - Parameter Table Supported on PCH; Detail JEDEC Specification

Intel PCH-LP
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Intel Confidential
Serial Flash Discoverable Parameter (SFDP) Overview
5.3 Parameter Table Supported on PCH
The flash controller first checks for a valid SFDP header. The value of the major and
minor revision fields in the SFDP header are don’t care. If a valid SFDP header is found,
the controller supports auto discovery of the Component Property Parameter Table
(CPPT).
The following capabilities are only supported on PCH if CPPT is successfully discovered
and parameter values indicate that they are supported. These capabilities are not
supported as default.
•Quad I/O Read
Quad Output Read
•Dual I/O read
Block /Sector Erase size
Note: If SFDP is valid and advertises 4 Kbyte erase capability, then BES is taken from the
SFDP table, otherwise it is taken from the BIOS VCSS table.
PCH will also read the following opcode from parameter table and store to PCH is SFDP
is valid and the following function is supported.
Erase Opcode
Dual Output Fast Read Opcode
Dual I/O Fast Read Opcode
Quad Output Fast Read Opcode
Quad I/O Fast Read Opcode
5.4 Detail JEDEC Specification
Please refer to www.jedec.com JESD216 for detail SFDP specification on SPI.
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