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Intel PCH-LP - Default Chapter; Table of Contents

Intel PCH-LP
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Intel Confidential 3
ContentsContents
1 Introduction............................................................................................................9
1.1 Overview ...........................................................................................................9
1.2 Terminology .....................................................................................................10
1.3 Reference Documents........................................................................................10
2 PCH SPI Flash Architecture................................................................................11
2.1 Descriptor Mode................................................................................................11
2.2 Serial Flash Discoverable Parameter (SFDP)..........................................................11
2.3 SPI Fast Read...................................................................................................11
2.4 Intel
®
TPM on SPI Bus.......................................................................................11
2.5 Boot Destination Option .....................................................................................11
2.5.1 Boot Flow for Broadwell PCH-LP Family......................................................11
2.6 Flash Regions ...................................................................................................12
2.6.1 Flash Region Sizes..................................................................................12
2.7 Hardware vs. Software Sequencing......................................................................13
3 PCH SPI Flash Compatibility Requirement.......................................................15
3.1 Intel
®
microarchitecture code name Broadwell PCH-LP SPI Flash Requirements ......... 15
3.1.1 SPI-based BIOS Requirements.................................................................15
3.1.2 Integrated LAN Firmware SPI Flash Requirements.......................................16
3.1.2.1 SPI Flash Unlocking Requirements for Integrated LAN....................16
3.1.3 Intel
®
Management Engine Firmware (Intel
®
ME FW) SPI Flash Requirements 16
3.1.4 SFDP....................................................................................................17
3.1.5 JEDEC ID (Opcode 9Fh) ..........................................................................17
3.1.6 Multiple Page Write Usage Model..............................................................17
3.1.7 Hardware Sequencing Requirements.........................................................18
3.2 Broadwell PCH-LP SPI AC Electrical Compatibility Guidelines....................................19
3.3 SPI Flash DC Electrical Compatibility Guidelines.....................................................21
4 Descriptor Overview............................................................................................23
4.1 Flash Descriptor Content ....................................................................................24
4.1.1 Descriptor Signature and Map..................................................................24
4.1.1.1 FLVALSIG - Flash Valid Signature
(Flash Descriptor Records)24
4.1.1.2 FLMAP0 - Flash Map 0 Register
(Flash Descriptor Records)25
4.1.1.3 FLMAP1—Flash Map 1 Register
(Flash Descriptor Records)25
4.1.1.4 FLMAP2—Flash Map 2 Register
(Flash Descriptor Records)26
4.1.2 Flash Descriptor Component Section.........................................................26
4.1.2.1 FLCOMP—Flash Components Register
(Flash Descriptor Records)26
4.1.2.2 FLILL—Flash Invalid Instructions Register
(Flash Descriptor Records)28
4.1.2.3 FLILL1—Flash Invalid Instructions Register
(Flash Descriptor Records)28
4.1.3 Flash Descriptor Region Section ...............................................................29
4.1.3.1 FLREG0—Flash Region 0 (Flash Descriptor) Register ..........................
(Flash Descriptor Records)29
4.1.3.2 FLREG1—Flash Region 1 (BIOS) Register
(Flash Descriptor Records)29

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