Intel SE7500CW2 - Figure 7. SE7500 CW2 PCI Interrupt Mapping Diagram

Included PCI Devices SE7500CW2 Server Board Technical Product Specification
26
Revision 1.40
Figure 7. SE7500CW2 PCI Interrupt Mapping Diagram
SLOT #3 SLOT #4 SLOT #5
INT A
INT
B
INT
C
INT D
SLOT #1 SLOT #2
ICH3
PIRQC#
ICH3
PIRQD#
ICH3
PIRQA#
ICH3
PIRQE#
ICH3
PIRQB#
ICH3
PIRQF#
ICH3
PIRQG#
ICH3
PIRQH#
P2-IRQ0
P2-IRQ1
P2-IRQ2
P2-IRQ3
P2-IRQ4
P2-IRQ5
P2-IRQ6
P2-IRQ7
P1-IRQ0
P1-IRQ1
P1-IRQ2
P1-IRQ3
P1-IRQ4
P1-IRQ6
PCI
RISER
NIC2
VGA
ATA
NIC1
Note: P1 is P64H2 PCI
-
bus A, P2 is P64H2 PCI
-
bus B
P64H2
BT_INTR#