Lattice Semiconductor ECP5 Technical Notes

42
ECP5 and ECP5-5G High-Speed I/O Interface
Using Clarity Designer to Build and Plan High Speed DDR Interfaces
The Clarity Designer tool is used to configure, build and plan placement all DDR interfaces. This section will cover
how Clarity Designer is used to configure and plan placement for the DDR interfaces. In addition to building and
planning Clarity Designer can be used to build top level modules by connecting the modules together in the Builder.
For step by step assistance with Clarity, please refer to the Clarity Designer User Manual. Clarity Designer can be
opened from the Tools Menu in Project Navigator. Figure 38 shows a Clarity Design Project which includes follow-
ing three tabs:
• Catalog – Used to Configure the DDR Modules
• Builder – Used to Build the HDL file that includes all the DDR modules configured
• Planner – Used to Plan the Placement of the various DDR Interfaces
Figure 38. Clarity Design Main Window
Note: It is recommend that all the DDR modules required for the current design be generated in the same Clarity
Design project. This will allow for the Design Rule Checking as well as Resource Conflict Checking for all the mod-
ules at the same time.
Configuring DDR Modules in Clarity Designer
The catalog section of Clarity Design lists all the DDR architecture modules available on ECP5 and ECP5-5G.
All the DDR modules are located under Architecture Modules – IO. This includes:
• SDR – Select to build SDR Modules
• DDR_GENERIC – Select to build any DDR Generic Receive and Transmit Interfaces
• GDDR_7:1 – Select to build 7:1 LVDS Receiver and Transmit Interface
• DDR_MEM – Select to build DDR Memory Interfaces
To see the detailed block diagram for each interface generated by Clarity Designer see the High-Speed DDR Inter-
face Details section.

Lattice Semiconductor ECP5 Specifications

General

Brand	Lattice Semiconductor
Model	ECP5
Category	Recording Equipment
Language	English