Lattice Semiconductor MachXO2 User Manual

MachXO2 and MachXO3 Starter Kit Evaluation Board User Guide
Evaluation Board User Guide
© 2014-2022 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
20 FPGA-EB-02036-1.4
Table 7.4. Expansion Header Pin Information (J6)
Header Pin Number
-4000 Function
-6900C Function
MachXO2/MachXO3 Ball
1
VCCIO2
VCCIO2
K8,K9,N5,N12
2
VCCIO2
VCCIO2
K8,K9,N5,N12
3
PB27B
PB35B
T12
4
PB26B
PB34B
T14
5
PB27A
PB35A
R11
6
PB26A
PB34A
R13
7
PB24A
PB31A
T11
8
PB23D
PB28B
M11
9
PB24B
PB31B
P11
10
PB23C
PB28A
N10
11
GND
GND
—
12
GND
GND
—
13
PB21B
PB26B
T10
14
PB23A
PB29A
P10
15
PB21A
PB26A
R9
16
PB23B
PB29B
R10
17
PB20A
PB23A/PCLKT2_1
T9
18
PB18B
PB21B
N9
19
PB20B/PCLKC2_1
PB23B/PCLKC2_1
P9
20
PB18A
PB21A
M8
21
GND
GND
—
22
GND
GND
—
23
PB15B
PB18B
T8
24
PB12B
PB15B
L8
25
PB15A
PB18A
P8
26
PB12A
PB15A
M6
27
PB10A
PB13A
R7
28
PB13B/PCLKC2_0
PB16B/PCLKC2_0
R8
29
PB10B
PB13B
P7
30
PB13A/PCLKT2_0
PB16A/PCLKT2_0
T7
31
GND
GND
—
32
GND
GND
—
33
PB9D
PB10B
L7
34
PB7B
PB9B
R6
35
PB9C
PB10A
N6
36
PB7A
PB9A
T5
37
PB6B
PB7B
R4
38
PB3A
PB4A
P4
39
PB6A
PB7A
T3
40
PB3B
PB4B
T4

Lattice Semiconductor MachXO2 Specifications

General

Brand	Lattice Semiconductor
Model	MachXO2
Category	Controller
Language	English