Table 38. Processor configuration details (continued)
Item
Option
Description
Processor Socket N/A
-
Processor ID
N/A
-
Processor Frequency
N/A
-
Processor Max Ratio N/A
-
Processor Min Ratio N/A
-
Microcode Revision N/A
-
L1 Cache RAM N/A
-
L2 Cache RAM N/A
-
L3 Cache RAM N/A
-
Processor 0 Version
N/A
-
Hyper-Threading [ALL] Disable/Enable Enable Hyper Threading, i.e. enable/disable Logical
Processor threads through software.
Hardware Prefetcher Disable/Enable Enable/Disable MLC Streamer Prefetcher (MSR 1A4h Bit
[0]).
Adjacent Cache Prefetch Disable/Enable Enable/Disable MLC Spatial Prefetcher (MSR 1A4h Bit
[1]).
DCU Streamer Prefetcher Disable/Enable DCU streamer prefetcher is an L1 data cache prefetcher
(MSR 1A4h Bit[2]).
DCU IP Prefetcher Disable/Enable DCU IP prefetcher is an L1 data cache prefetcher.
LLC Prefetch Disable/Enable Enable/Disable LLC Prefetch on all threads.
Extended APIC Disable/Enable Enable/Disable extended APIC support.
Note: This will enable VT-d automatically if x2APIC is
enabled.
Enable IntelĀ® TXT Disable/Enable
-
VMX
Disable/Enable
Enable the Vanderpool Technology. This operation will
take effect after reboot.
Enable SMX Disable/Enable Enable Safer Mode Extensions.
PPIN Control Lock/Disable
Unlock/Enable
Enable/Disable PPIN Control.
PSMI Configuration N/A Set PSMI configuration.
Processor Dfx Configuration N/A Display and provide options to change the processor Dfx
settings.
Common RefCode configuration
See the table below for the description of an option in Common RefCode Configuration screen:
Chapter 5. BIOS setup 127