LSIS XBC-DR30E - Page 191

(2) I
nterface with external devices
The internal circuit of High-speed counter is as shown below.
(a) “E” type
I/O Internal circuit
Terminal
No.
Signal
Operation
On/Off
guaranteed
voltage
1-phase 2-phase
Input
P00
Ch 0
Pulse input
Ch 0
A-phase input
On 20.4~28.8V
Off 6V or less
P01
Ch 1
Pulse input
Ch 0
B-phase input
On 20.4~28.8V
Off 6V or less
P02
Ch 2
Pulse input
Ch 2
A-phase input
On 20.4~28.8V
Off 6V or less
P03
Ch 3
Pulse input
Ch 2
B-phase input
On 20.4~28.8V
Off 6V or less
P04
Ch 0
Preset input
Ch 0
Preset input
On 20.4~28.8V
Off 6V or less
P05
Ch 1
Preset input
-
On 20.4~28.8V
Off 6V or less
P06
Ch 2
Preset input
Ch 2
Preset input
On 20.4~28.8V
Off 6V or less
P07
Ch 3
Preset input
-
On 20.4~28.8V
Off 6V or less
COM0 COM (input common)
2.7 kΩ
2.7 kΩ
2.7 kΩ
2.7 kΩ
5.6 kΩ
5.6 kΩ
5.6 kΩ
5.6 kΩ
For XBC-DR10E, there is no physical circuit for P0006 ~ P0007. Turn on this contact
point by program.
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