12. ADC
Problem 39: Why is the SAR ADC result 0v with input voltages up to 30 mv or more?
Problem 40: Why is the SAR ADC results not consistent and accurate?
ADC accuracy and repeatability are due to the possible error sources listed below:
•
ADC silicon TUE, (i.e., total Unadjusted Error)
• System noise
• Reference voltage accuracy and drift over temperature and fab process
• User PCB circuit design implementations and IR drops
• ADCx BIASCOMP, BIASREFBUF, BIASR2R values that must be loaded from NVM Software Calibration Area
Mapping Register
12.1 Typical SAM SAR ADC Total Unadjusted Error Sources (TUE)
• ADC Offset Error
(1)
• ADC Gain Error
(1)
• Quantization Error
(1)
• Non-Linearity Error (INL, DNL)
(1)
Notes:
1. These error sources are all documented in the data sheet and must be considered when assuming
expectations of ADC accuracy.
2. However, there are other factors as well that impact ADC accuracy that are not defined in the data sheet
and some that are but might not be obvious. User PCB design and VREF accuracy can also affect the ADC
accuracy, and a user must consider these for their application, which are typically overlooked.
3. It is worth noting that SAMPCTRL.OFFCOMP (i.e., offset compensation), in most SAM SAR ADC’s
compensate for only the comparator inside the ADC, and that is in reference to the ADC’s internal ground
not the PCB system ground.
12.2 ADC Noise
Unique to the SAM and PIC32C families, I/O pins with mixed signal functions, (i.e. shared analog functions), are
powered by VDDANA, refer to the data sheet “GPIO Clusters map”. This means that when a mixed signal pin is being
used for a digital function and driving a load and toggling at even a moderate rate, the instantaneous on/off current
sourced from VDDANA or sunk by GNDANA creates a ripple noise in the analog domain and additional challenges
especially when trying to measure low-level signals in the double digit milli-volt range.
ADC
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and its subsidiaries
Manual
DS70005439B-page 52