12.3 VREF Accuracy
• FS LSb Error = (((VREF accuracy + Drift + System Noise) / VREF)/2n)
= ((2n * (VREF accuracy + Drift + System Noise)) / VREF)
•
Actual worst-case ADC Result = (ADC Ideal Result / 2n) * FS LSb Error
For example: SAM D5x/E5x Family SAR ADC Worst Case configuration over distribution of parts, process,
voltage and temperature in LDO mode.
Where,
– Internal VREF = 1.2v ± 50 mv
– Internal VREF drift over Temperature 0.02%/°C over 25c-85c = 14 mv
– System noise LDO mode = ~50-75 mv, BUCK Mode ~200-300 mv
– 12-bit resolution
– ADC AIN0 input signal = 0.6V, (i.e., 50% scale of VREF)
FS LSb Error = (2
n
* (VREF accuracy + VREF Drift + System Noise)) / VREF
=(4096 * (50 mv+14 mv+50 mv) )/1.2V
=389.12 LSb
ADC Result Error = (ADC Ideal Result of 0.6v input/ 2
n
) * FS LSb Error
= (2048/4096) * 389.12
= 194.56 LSb error or 57 mv, (i.e., 1 LSb= (VREF/2
n
) = (1.2v/4096) = 293µV/LSb)
12.4 Circuit IR Drop Errors
• Typical SAM/PIC32C SAR ADC (referring to the figure below)
– ADC IDD = 45-600 µa
– RINT = 45-50Ω
– VRINT = (ADC IDD * RINT)
= 2.02 mv ≤ VRINT ≤ 30 mv
• Typical Circuit Board Characteristics
– Ground plane = ~0.06 Ohms/inch (i.e., 0.06 Ohms/25.4 mm)
– Assumption: Ground plane W = 76.2 mm , L= 101.6 mm, ADC-to-Sensor ~50.8 mm
– Ground current 200-1000 mA
– Therefore: 25 mv ≤ VRGND ≤ 120 mv
ADC
© 2022 Microchip T
echnology Inc.
and its subsidiaries
Manual
DS70005439B-page 54
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