EasyManuals Logo

Microchip Technology SAM Series User Manual

Microchip Technology SAM Series
76 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #58 background imageLoading...
Page #58 background image
14. I
2
C
Problem 41: Why does the I
2
C com link not work?
The I
2
C default interface standard under the original I
2
C specification was 5V for TTL compatibility. All of the
SAM legacy devices, except 5V VDDIO parts, do not have any 5V tolerant I/O pins and therefore are not
compatible with anything other than 3.3V nominal signaling levels. On PIC32MX/PIC32MM/PIC32MZ/PIC32MK
only select the I/O pins that are 5V tolerant and not all the I
2
C ports. For additional information, refer to the
device-specific data sheet
Notes: 
1. It is vital for reliability and proper signaling compatibility levels that the user ensure that any inter I
2
C
communication and external cable I
2
C bus devices on the network are signal level compatible.
2. In most designs, only the Host has pull up on what normally is open drain SDA and SCL. Every device has
a certain SDA and SCL drive strength (i.e., IOL spec). If there are multiple I
2
C nodes on the network with
pull-ups the user must ensure that the sum of all the pull-ups does not exceed any one node’s ability to sink
the sum of the network pull-up currents to ensure the proper I
2
C logic signal levels (i.e., VOL and VIL spec
levels).
3. In a mixed signal level network, If the pull-up is on the 3.3v side then the resulting VOH may not meet one or
more of the nodes on the high voltage sides logic high VIH spec. If the pull-ups are on a high voltage node
then there is the possibility of injecting current into the lower voltage nodes IC’s unless the user employs a
level shifter.
4. If the users application provides the ability to connect to an external I
2
C bus network, often times the user’s
application cannot anticipate what equipment the external nodes I
2
C bus operating voltage levels are. In the
case of non-5v tolerant SDA/SCL in nominal 3.3V MCU’s, the user must consider a level shifter as depicted in
the following figure to be compatible with respect to the external I
2
C node operating voltage levels.
Important:  VDD2 must be ≥ VDD1
I2C
© 2022 Microchip T
echnology Inc.
and its subsidiaries
Manual
DS70005439B-page 58

Table of Contents

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the Microchip Technology SAM Series and is the answer not in the manual?

Microchip Technology SAM Series Specifications

General IconGeneral
BrandMicrochip Technology
ModelSAM Series
CategoryMicrocontrollers
LanguageEnglish

Related product manuals