507
APPENDICES
A
Appendix 5 Replacing Basic Model QCPU or Qn(H)CPU with QnUCPU
Appendix 5.1 Replacement precautions
(2) Program
Item Precautions Replacement method Reference
Language and instruction Some instructions are not supported.
Replace the instructions not supported in the
Universal model QCPU are described in Page
518, Appendix 5.3.
Page 518, Appendix 5.3
Floating-point operation
The Universal model QCPU performs program
operations of floating-point data in single
precision.
Instructions for floating-point double-precision
operations are added for the Universal model
QCPU. Replace the instructions if floating-point
double-precision operations are required, as
described in Page 535, Appendix 5.4.1.
Page 497, Appendix 4.4,
Page 535, Appendix 5.4.1,
Page 542, Appendix 5.4.2
When using the floating-point data comparison
instructions, LDE, ANDE, ORE, LDED,
ANDED, and ORED, if the comparison
source data are -0, nonnumeric, unnormalized
number, or ±
, "OPERATION ERROR" (error
code: 4101) is detected.
*2
( indicates one of
the following; =,<>,<=,>=,<,>.)
When the floating-point data comparison
instructions are used, modify the program as
described in Page 542, Appendix 5.4.2.
Device range check at
index modification
When a device number exceeds a setting range
due to index modification, "OPERATION
ERROR" (error code: 4101) is detected.
Deselect the "Check Device Range at Indexing"
checkbox in the PLC RAS tab of the PLC
parameter dialog box so that checking is not
performed.
Page 195, Section 3.17
Page 546, Appendix 5.4.3
Program execution type
Low-speed execution type programs are not
supported.
Use scan execution type programs or fixed scan
execution type programs.
Page 88, Section 2.10
A program execution type cannot be changed
by remote operation.
For the QnUDVCPU and QnUDPVCPU whose
serial number (first five digits) is "18112" or later,
however, a program execution type can be
changed by remote operation when it is the
scan execution type or stand-by type.
Use instructions for switching program
execution types, such as PSTOP, POFF, and
PSCAN.
Page 102, Section 2.10.5
Latch setting
If latch ranges of internal user devices are
specified, the processing time is added in
proportion to the device points set to be latched.
(For example, if 8K points are latched for the
latch relay (L), the processing time of 28.6µs is
required.)
The latch function of the Universal model QCPU
is enhanced.
(1) Large-capacity file register (R, ZR)
(2) Writing/reading device data to the
standard ROM (SP.DEVST and
S(P).DEVLD instructions)
(3) Latch range specification of internal
devices
(4) "Time Setting" specification in the latch
interval setting parameter
*3
Change the latch method to the one described
above according to the application.
Page 122, Section 3.3,
Page 124, Section 3.3 (5)
(b),
Page 550, Appendix 5.4.4
Interrupt program
The interrupt pointer (I49) for the high-speed
interrupt function is not supported.
*2
Consider the use of interrupt pointers for fixed
scan interrupt (I28 to I31).
Page 180, Section 3.13.2
Interrupt counter is not supported.
Check the numbers of executions for interrupt
programs on the Interrupt program monitor list
screen.
The interrupt pointers (I32 to I40) due to an
error are not supported.
--- Page 410, Section 4.11
SCJ instruction
When the SCJ instruction is used in the
Universal model QCPU, the AND SM400 (or
NOP instruction) needs to be inserted
immediately before the SCJ instruction.
Insert the AND SM400 (or NOP instruction)
immediately before the SCJ instruction when
the SCJ instruction is used.
Section 6.5 in the
MELSEC-Q/L
Programming Manual
(Common Instruction)
ZPUSH instruction
The number of index registers is increased to
20 for the Universal model QCPU. The area for
saving the data in the index register with the
ZPUSH instruction is increased as well.
Increase the save areas used for the ZPUSH
instruction as needed.
Section 7.19 in the
MELSEC-Q/L
Programming Manual
(Common Instruction)
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