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Mitsubishi MELSEC-Q/L

Mitsubishi MELSEC-Q/L
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431
TO, TOP, DTO, DTOP
1
2
3
4
4
6
7
8
7.8 Buffer memory access instruction
7.8.2 TO, TOP, DTO, DTOP
Remark
1. The value of n1 is specified by the upper 3 digits of hexadecimal 4 digits which represent the head I/O number of an
intelligent function module.
QCPU
LCPU
2. QCPU and LCPU establishe the automatic interlock of the TO/DTO instructions.
Power
supply
module
CPUQX10 QX10QX10 QX10
Q68
ADV
QY41
P
QY10 QY10
0000
H 0010H 0020H 0030H 0040H 0050H 0070H 0080H
Specify K4 or H4 as the head I/O number to be written.
Head I/O number configured in
the I/O assignment setting
Power
supply
module
CPU Built-in
I/0
Built-in
CC-Link
LX40
C6
LX40
C6
LX40
C6
L60
AD4
LY41
NT1P
LY10
R2
LY10
R2
LY10
R2
0000
H 0010H 0030H 0040H 0050H 0060H 0070H 0090H 00A0H 00B0H
CPU module
(L26CPU-BT)
Specify K6 or H6 as the head I/O number to be written.
Head I/O number configured in
the I/O assignment setting

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