Mitsubishi MELSEC-Q/L User Manual

676
TO, TOP, DTO, DTOP
Remark
The n1 is specified by the first 3 digits of the hexadecimal 4 digits which represent the head I/O number of the slot mounted
to the CPU module.
n1 : Head I/O number of the host CPU (BIN 16 bits)
• Basic model QCPU: 3E0
H
• Universal model QCPU: 3E0
H
to 3E3
H
n2 : CPU shared memory address of the write destination host CPU (BIN 16 bits)
• Basic model QCPU: 192 to 511
• Universal model QCPU: 2048 to 4095, 10000 to 24335*
2
: Data to be written or head number of the devices where the data to be written is stored (BIN 16 bits)
n3 : Number of data blocks to be written (BIN 16 bits)
• Basic model QCPU: TO(P): 1 to 320, DTP(P) : 1 to 160
• Universal model QCPU: TO(P): 1 to 14336*
2
, DTP(P) : 1 to 7168*
2
*2: The setting range varies depending on the auto refresh setting range of the multiple CPU high speed transmission function.
Function
TO
(1) Writes device data of words to n3 to the CPU shared memory address specified by n2 of the host CPU module or later
address.
CPU Slot Slot 0 Slot 1 Slot 2
Head I/O number 3E00 3E10 3E20 3E30
n1 3E0 3E1 3E2 3E3
9.1.2 TO, TOP, DTO, DTOP Writing to host CPU shared memory
9.1.2 TO, TOP, DTO, DTOP
• Q00CPU, Q01CPU: The serial number (first five digits) is
"04122" or later.
Setting
Data
Internal Devices
R, ZR
J\
U\G
Zn
Constants
K, H
Other
Bit Word Bit Word
n1
n2 ––
–– ––
n3 ––
High
performance
Process Redundant LCPU
Basic
Universal
Ver.
Command
Command
n3
n3
n1
n1
n2
n2
TO, DTO
TOP, DTOP
S
S
P
indicates an instruction symbol of TO/DTO.
S
S
S
Device memory
Writes the
data of n3
words
Host CPU
n3
CPU shared memory
of host CPU (n1)
n2
S

Mitsubishi MELSEC-Q/L Specifications

General

Brand	Mitsubishi
Model	MELSEC-Q/L
Category	Controller
Language	English