Mitsubishi MELSEC-Q/L

825
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Appendix 1OPERATION PROCESSING TIME Appendix 1.5Operation Processing Time of LCPU
(2) Table of the time to be added when file register, extended data register, extended link register, module access device,
and link direct device are used
(a) When using L02CPU, L26CPU-BT, L02CPU-P, L26CPU-PBT
Device name Data
Device
Specification
Location
Processing Time (µs)
L02CPU,
L02CPU-P
L26CPU-BT,
L26CPU-PBT
File register (R) When standard RAM is used
Bit
Source
0.100 0.048
Destination
0.220 0.038
Word
Source
0.100 0.048
Destination
0.100 0.038
Double word
Source
0.200 0.095
Destination
0.200 0.086
File register (ZR),
Extended data register (D),
Extended link register (W)
When standard RAM is used
Bit
Source
0.140 0.057
Destination
0.280 0.048
Word
Source
0.140 0.057
Destination
0.140 0.048
Double word
Source
0.240 0.105
Destination
0.240 0.095
Module access device (Un\G )
Bit
Source
11.700 11.200
Destination
15.400 15.300
Word
Source
9.460 9.410
Destination
19.000 19.000
Double word
Source
11.000 10.900
Destination
18.800 18.700
Link direct device (Jn\ )
Bit
Source
41.600 37.900
Destination
63.200 58.100
Word
Source
40.700 37.500
Destination
31.700 30.800
Double word
Source
49.400 43.400
Destination
39.600 37.300