Quectel EP06 Series - PCM and I2 C Interfaces

LTE-A Module Series
EP06 Series Hardware Design
EP06_Series_Hardware_Design 23 / 56
"*" means under development.
3.6. PCM and I2C Interfaces
The module supports audio communication via Pulse Code Modulation (PCM) digital interface and I2C
interface.
The following table shows the pin definition of PCM and I2C interfaces which can be applied on audio
codec designs.
Table 8: Pin Definition of PCM and I2C Interfaces
The PCM interface supports the following modes:
 Primary mode (short frame synchronization, working as either master or slave)
 Auxiliary mode (long frame synchronization, working as master only)
In primary mode, the data is sampled on the falling edge of the PCM_CLK and transmitted on the rising
edge. The PCM_SYNC falling edge represents the MSB. In this mode, the PCM interface supports 256
kHz, 512 kHz, 1024 kHz or 2048 kHz PCM_CLK at 8 kHz PCM_SYNC, and also supports 4096 kHz
PCM_CLK at 16 kHz PCM_SYNC.
Pin No.
Pin Name
I/O
Power
Domain
Description
Comment
45
PCM_CLK
DI/DO
1.8 V
PCM clock signal
47
PCM_DOUT
DO
1.8 V
PCM data output
49
PCM_DIN
DI
1.8 V
PCM data input
51
PCM_SYNC
DI/DO
1.8 V
PCM frame
synchronization
signal
In master mode, it is an
output signal.
In slave mode, it is an input
signal.
30
I2C_SCL
DO
1.8 V
I2C serial clock
Externally pulled up to 1.8 V.
32
I2C_SDA
IO
1.8 V
I2C serial data
Externally pulled up to 1.8 V.
NOTE
S