Technical specifications   
8.5 Hardware descriptions 
  SIMATIC IPC277G 
100  Operating Instructions, 08/2021, A5E50059956-AA 
8.5.5.4  Watchdog state register 
 
Trigger Watchdog Timer I event. This bit is self-clearing. 
Watchdog Timer I status bit: 
•  0: Watchdog Timer I is running. 
•  1: Watchdog Timer I issues time-out event. 
8.5.5.5  Battery status register 
The status of the CMOS battery is monitored; the status (two-tier) can be read from the 
battery status register. 
Meaning of the bits 
 
Battery status register (read-only, address 404Dh) 
CMOS battery capacity is still sufficient. 
CMOS battery capacity is exhausted (remaining capacity is 
sufficient for approx. one month) 
 
8.5.5.6  NVRAM address register 
NVRAM occupies a 512 KB memory address area that can be read via PCI registers. 
Meaning of the bits 
 
NVRAM base address register 
NVRAM memory address (default 
Length of the memory area 
Address variable (depending 
on the slot where NVRAM is 
Address is assigned dynamically 
(depending on device