Overview of All Actions
S7-GRAPH for S7 300/400 Programming Sequential Control Systems
13-2 C79000-G7076-C526-01
Action Explanation Address
range
Event In-
struc-
tion
Address
Area
Location Time
Constant
SC Q,I,M,D* m.n As long as the step is active and the
condition (interlock) is satisfied, the
address is set to 1 and then remains set
to 1.
0.0 to
65535.7
RC Q,I,M,D* m.n As long as the step is active and the
condition (interlock) is satisfied, the
address is set to 0 and then remains set
to 0.
0.0 to
65535.7
DC Q,I,M,D* m.n T#<const> n seconds after step activation and as
long as the step is active and the
condition (interlock) is satisfied, the
signal state of the address is 1. If the step
is not active, the signal state of the
address is 0.
0.0 to
65535.7
LC Q,I,M,D* m.n T#<const> If the step is active and the condition
(interlock) is satisfied, the address has
signal state 1 for n seconds. If the step is
not active, the signal state of the address
is 0.
0.0 to
65535.7
CALLC FB, FC,
SFB,
SFC
Block
number
As long as the step is active and the
condition (interlock) is satisfied, the
specified block is called.
An instance DB is required with CALL[C] FB/SFB.
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