Sony HCD-CPX11 - Page 46

4646
HCD-CPX11
0.9 ± 0.4 Vp-p
1.9 Vp-p
59.1 ns
8
IC101 ra (RFACO)
(CD play mode)
1 µs/DIV 200 mV/DIV
•Waveforms
– BD81A Board –
9
IC101 uj (XTAO)
40 ns/DIV 1 V/DIV
12.4 Vp-p
12.2 µ s
7
Q642, 643 (Collector)
(REC mode)
10 µs/DIV 5 V/DIV
– TC Board –
3.1 Vp-p
30.5 µ s
2.7 Vp-p
62.5 ns
1
IC300 qa (XCOUT)
20 µs/DIV 1 V/DIV
– MAIN Board –
2
IC300 qd (XOUT)
40 ns/DIV 1 V/DIV
5 Vp-p
20.7 µ s
4.2 Vp-p
326 ns
3 Vp-p
81.3 ns
3
IC603 q; (LRCK)
10 µs/DIV 2 V/DIV
– S-MASTER AMP Board –
4
IC603 qa (BCK)
100 ns/DIV 2 V/DIV
5
IC604 6 (3A)
40 ns/DIV 1 V/DIV
3.6 Vp-p
27.3 µ s
6
IC801 ts (OSC2)
20 µs/DIV 2 V/DIV
– LCD Board –
• IC BLOCK DIAGRAMS
– BD81A Board –
IC301 TC94A34FG-002
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40
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42
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8
43
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54
RAS
CAS
OE
WE
PIO7
PIO6
PIO5
PIO4
Bus
Switch
BUCK
CCE
AD12
AD11
General
In/Output Port
Address Calc.
2sets
Y- P o i n ter
register
C-Pointer
register
X-Pointer
register
VDDM
SRMSTB
VDDT
AD10
AD9
ERAM
2k word
CRAM
4k word
CROM
4k word
YRAM
4k word
XRAM
4k word
SRAM/
DRAM I/F
SRAM I/F
1Mbit
SRAM
X-Bus
Y- Bus
AD7
AD6
AD5
AD8
VC0
Timing
Generator
PRAM
Instruction
Decoder
Program
Control
MCU. I/F
register
XO • X1 • X2
Y0 • Y1 • Y2
MX MY MZ
MAC
A0 A1
AX AY
ALU
A2 A3
DIT
round & limit round & limit
Audio I/F
LRCKIA
BCKIA
SDI0
LRCKO
BCKO
SDO0
VSS
VDDT
MIACK
MICK
MIDIO
MILP
MICS
STANBY
RESET
VDDP
AD4
AD3
AD2
AD1
AD0
VSS
VDD
CKO
VDDX
XO
TEST
VCOI
VSSX
XI
MIMD
VSSP
PIO3
PIO2
PIO1
PIO0
VSS
CKI
VDD
TXO
SFSY
SBSY
DATA
POM
Sub code
I/F
CDP Cont
I/F