Sony STR-DA5300ES - Block Diagram - HDMI Section (1;2)

STR-DA5300ES
3636
STR-DA5300ES
(Page 38)
6-4. BLOCK DIAGRAM – HDMI Section (1/2) –
(Page 37)
(Page 38)
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• SIGNAL PATH
: AUDIO (DIGITAL)
: VIDEO
VIDEO SYSTEM CONTROLLER
IC3610 (1/3)
CN3501
HDMI
ASSIGNABLE
(INPUT ONLY)
IN 6
CN3502
HDMI
ASSIGNABLE
(INPUT ONLY)
IN 5
CN3503
HDMI
ASSIGNABLE
(INPUT ONLY)
IN 4
R0X0+
R0X0-
R0X1+
R0X1-
R0X2+
R0X2-
R0XC+
R0XC-
R1X0+
R1X0-
R1X1+
R1X1-
R1X2+
R1X2-
R1XC+
R1XC-
R2X0+
R2X0-
R2X1+
R2X1-
R2X2+
R2X2-
R2XC+
R2XC-
22
21
7
9
25
24
4
6
28
27
1
3
19
18
10
DATA0+
DATA0–
DATA1+
DATA1–
DATA2+
DATA2–
CLOCK+
CLOCK–
SDA (5V)
SCL (5V)
+5V POWER
HOT PLUG DET
18
CEC
13
12
16
15
HDMI INPUT
SELECT
IC3503
GATE
IC3524(1/3)
DSDA0
30
HPD0
16
RPWR0
32
DSCL0
31
42
41
7
9
45
44
4
6
48
47
1
3
39
38
10
DATA0+
DATA0–
DATA1+
DATA1–
DATA2+
DATA2–
CLOCK+
CLOCK–
SDA (5V)
SCL (5V)
+5V POWER
HOT PLUG DET
18
CEC
13
12
16
15
DSDA1
50
19
HPD1
36
DSCL1
51
62
61
7
9
65
64
4
6
68
67
1
3
59
58
10
DATA0+
DATA0–
DATA1+
DATA1–
DATA2+
DATA2–
CLOCK+
CLOCK–
SDA (5V)
SCL (5V)
+5V POWER
HOT PLUG DET
18
CEC
CEC
13
12
16
15
DSDA2
70
HPD2
56
DSCL2
71
HDMI RECEIVER
IC3511
(1/2)
HDMI
TRANSCEIVER
IC3513
10
11
40
39
TX0+
7
TX0-
TX1+
TX1-
TX2+
TX2-
TXC+
TXC-
8
44
43
4
5
48
47
1
2
52
R0XC+
R0XC–
R0X0+
R0X0–
R0X1+
R0X1–
R0X2+
R0X2–
DSDA0
DSCL0
51
33
R0PWR5V
35
DSCL1
29
DSDA1
28
R1PWR5V
DSCL
DSDA
PWR5V
30
34
CSDA
CSCL
26
27
TSCL
78
TSDA
77
LSDA/EPSEL[0]
14
LSCL/EPSEL[1]
15
HPDIN
76
TPWR/I2CADDR
79
RESET#
13
9185_HPD[1]
9185_RST[1]
9185_HPD[1]
9185_RST[1]
93 94
9185_1_HPD1-3
9185_1_RST
DATA SELECTOR
IC3508
EEPROM
IC3509
2Y3
4
2Y1
5
1Y3
11
1Y1
14
3
2-COM
13
1-COM
5
SDA
6
SCL
10
A
9
B
7
WP
8
TX_RST
30
TX_INT
123
UC3V_SCL
118
UC3V_SDA
UC3V_SCL
UC3V_SDA
UC3V_SCL
UC3V_SDA
UC3V_SCL
UC3V_SDA
UC3V_SDA,
UC3V_SCL
117
EDIO_SEL1 EDIO_SEL0
9
2Y0
1
1Y0
12
16 -13,10 -7,3 -1,
144,141 -138,135 -132,
129 -126,123 -120,
117 -114,111 -108
Q0 – Q35
98 -90, 86 -77 75 -67, 63 -56
D0 -D35
ODCK
5
HSYNC
20
VSYNC
21
DE
ODCK
HSYNC
VSYNC
DE
19
SPDIF
78
SD0 -SD3
4
4
4
36
MCLK
89
SCK
86
WS
85
IDCK
88
HSYNC
2
VSYNC
3
DE
1
81 -84
SPDIF
DL0, DR1,
DL1, DR2
4
DL2
21
SD0 -SD3
MCLK
5
SCK
11
WS
10
DCLK
15
DR0
16
9 – 6
17 – 20
TX0+
34
TX0–
33
7
9
TX1+
37
TX1–
36
4
6
TX2+
40
TX2–
39
1
3
TXC+
31
TXC–
30
10
HPD
DATA0+
DATA0–
DATA1+
DATA1–
DATA2+
DATA2–
CLOCK+
CLOCK–
SDA (5V)
SCL (5V)
HOT PLUG DET
CEC
51 19
12
16
15
13
DSDA
47
DSCL
46
INT
24
RESET#
25
CSDA
49
CSCL
48
CEC DATA
SWITCH
Q2001 – 2004
CN3511
HDMI
ASSIGNABLE
(INPUT ONLY)
OUT
TX_INT
TX_RST
TX_INT
TX_RST
CEC_RX
SPDIF WS MCK SCK SD0 -SD3
SD0 -SD3, SPDIF,
MCK, SCK, WS
95
94
XTALIN
XTALOUT
X3501
28.322MHz
32
33
34
CEC_TX
24
Q [4] - Q [11], Q[16] -Q[23], Q[28]-Q[35]
ODCK, HSYNC, VSYNC, DE
Q [4] - Q [11],
Q[16] -Q[23],
Q[28]-Q[35]
LEVER SHIFT
Q3501
GATE
IC3524(2/3)
RPWR1
52
LEVER SHIFT
Q3502
GATE
IC3524(3/3)
RPWR2
72
LEVER SHIFT
Q3503
12
13
11
2
1
3
9
10
8
31
52
37
19
19
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