The crystal oscillator driving strength can be changed at runtime using the LSEDRV[1:0] bits in RCC_BDCR, to
obtain the best compromise between robustness and short startup time on one side, and low-power-consumption
on the other side.
External source (LSE bypass)
In this mode, an external clock source must be provided, with a frequency up to 1 MHz. The external clock signal
(square, sinus, or triangle) with ~50 % duty cycle, must drive the OSC32_IN pin while the OSC32_OUT pin can
be used as GPIO (see Table 3).
AN5373
LSE clock
AN5373 - Rev 6
page 27/47
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