7 Recommendations
7.1 PCB (printed circuit board)
For technical reasons, it is best to use a multilayer PCB, with a separate layer dedicated to ground (V
SS
) and
another dedicated to the V
DD
supply.
This provides a good decoupling and a good shielding effect. For many applications, economical reasons prohibit
the use of this type of board. In this case, the major requirement is to ensure a good structure for ground and
power supply.
7.2
Component position
A preliminary layout of the PCB must separate circuits into different blocks:
• high-current circuits
• low-voltage circuits
• digital component circuits
• circuits separated according to their EMI contribution, in order to reduce noise due to cross-coupling
on the PCB
7.3 Ground and power supply
The following rules related to grounding must be respected:
• Ground every block (noisy, low-level sensitive, digital, or others) individually.
• Return all grounds to a single point.
• Avoid loops (or ensure they have a minimum area).
In order to improve analog performance, the user must use separate supply sources for V
DD
and V
DDA
, and place
the decoupling capacitors as close as possible to the device.
The power supplies (V
SS
, V
DD
, V
SSA
, V
DDA
, V
DDUSB
, V
DDIO2
, V
DDDSI
, or V
DDSMPS
) must be implemented close to
the ground line to minimize the area of the supplies loop. This is because the supply loop acts as an antenna, and
acts as the main transmitter and receiver of EMI. All component‑free PCB areas must be filled with additional
grounding to create a kind of shielding (especially when using single‑layer PCBs).
7.4
Decoupling
All power-supply and ground pins must be properly connected to the power supplies. These connections
(including pads, tracks, and vias) must have the lowest possible impedance. This is typically achieved with thick
track widths and, preferably, the use of dedicated power-supply planes in multilayer PCBs.
In addition, each power supply pair must be decoupled with filtering ceramic capacitors (100 nF) and a tantalum
or ceramic capacitor of about 10 μF, connected in parallel on the device.
Some packages use a common VSS pin for several VDD pins, instead of a pair of power pins (one VSS for each
VDD). In that case, the capacitors must be between each VDD pin and the common VSS pin. These capacitors
must be placed as close as possible to, or below the appropriate pins on the underside of the PCB. Typical values
are 10 to 100 nF, but exact values depend on the application needs.
AN5373
Recommendations
AN5373 - Rev 6
page 34/47
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