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ST STM32U5

ST STM32U5
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Figure 9. Power supply scheme for STM32U5F/5G/59/5Axxx (with SMPS)
DT69108V1
V
DDIO2
V
DD
Kernel logic
(CPU, digital
and memories)
Level shifter
IO
logic
Backup circuitry
(LSE, RTC, TAMP,
backup registers,
backup SRAM)
IN
OUT
GPIOs
1.55 – 3.6 V
IN
OUT
GPIOs
n x 100 nF
+ 10 µF
m x100 nF
Level shifter
IO
logic
+ 4.7 µF
m x VDDIO2
m x VSS
n x VSS
n x VDD
VBAT
V
CORE
Power switch
V
DDIO2
V
DDIO1
ADCs/
DACs/
OPAMPs/
COMPs/
VREFBUF
VREF+
VREF-
V
DDA
100 nF
+ 1 µF
VDDA
VSSA
V
REF
100 nF
+ 1 µF
VSSSMPS
2 x VDD11
VLXSMPS
VDDSMPS
V
DD
2.2 µH
2 x 2.2 µF
10 µF
SMPS ON
SMPS OFF
LDO
SMPS
VDDUSB
3.3 V
100 nF
Voltage regulator
VDDDSI
(2)
100 nF
VDD11
(1)
VDD11USB
(1)
VDD11DSI
(2)
(1) Only available on specific packages.
(2) Only available on STM32U5x9 devices.
AN5373
Power supply schemes
AN5373 - Rev 6
page 16/47

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