Tandy 1000 Technical Reference Manual

Tandy 1000
Technical Reference Manual
intel
8272A
Table 1. Pin Description (Continued)
DW
Symbol
i--'-
I~ - f;'n
t
-I ~ne-c~-
\Symbol. N~ ~~ To Name and Function
MFM 26 0 PLL MFM Mode. MFM mode
I \' I when "1,' FM mode
~ when "0
-pi-n' -~.- Connec-
No. Type tion
To Name and Function
f-------t. ----f----. --t-------
22 I PLl Data Window: Gener-
ated by PLL, and used
to sample data from
FDD
Must be enabled for all
1
operatlon.s., both Read
L .---".- '----__ __.t'nd Wnte. _
WE 25
0 FDD Write Enable: Enables
write data Into FDD
VCO
24 0
PLL YCO Sync: Inhibits VCO
In PLL when "0" (low)
enables
veo when '"
RD DATA 23 FDD
Read Data: Read data
L-_.~_
from FDD, containing
clock and data bits
---~-----
~-
WR ClK 21
Write Clock: Write data
rate to FDD FM ~ 500
kHz, MFM ~ 1 MHz, with
a pulse width
of 250 ns
for both FM and MFM
Figure 3. 8272A System Block Diagram
DESCRIPTION
Write Data
Format a Track
Write Deleted Data
Seek
Recalibrate (Restore to
0818
10 I Gop2
Track 0)
Sense Interrupt Status
Sense Drive Status
------------,L......J~----
------""L. __ ..Jr-----
Scan High or Equal
Scan
Low or Equal
Specify
Figure 4. 8272A Enhancements over the 8272
8272
VCO Sync
8272A
VCO Sync
B. Ability to Read Data When Gap 4A Contains 00
Trock Gop 4A (00)
Index Pulse ~'--- _
~ 560 j.lS in FM mode; 527..,5 in MFM mode
A Margin on the Index Pulse
Trock Gop 4A IIAM I Gop 1 I 10 I Gop 2 I Dote
Index Pulse ~
8272 veo Sync--' ,---
8272AVCOSy~
Address mark detection circuitry is internal to the FDC
which simplifies the phase locked loop and read elec-
tronics. The track stepping rate, head load time, and
head
unload time may be programmed by the user. The
8272A
offers many additional features such as multiple
sector transfers in both read and write modes with a
single command, and full IBM compatibility in both
single (FM) and double density (MFM) modes
For more information see the Intel Application Notes
AP-116 and AP-121.
FEATURES
8272A ENHANCEMENTS
On the 8272A, after detecting the Index Pulse. the
VCO Sync output stays low for a shorter period of
time. See Figure 4A.
On the 8272 there can be a problem reading data
when Gap 4A is 00 and there is no lAM. This occurs
on some older floppy formats. The 8272A cures this
problem by adjusting the VCO Sync timing so that it
is not low during the data field. See Figure 4B.
There are 15 separate commands which the 8272A wi II
execute. Each of these commands require multiple 8-bit
bytes to fully specify the operation which the processor
wishes the FDC to perform. The fOllowing commands
are available.
Read Data
Read 10
Read Deleted Data
Read a Track
Scan Equal
Hand-shaking signals are provided in the 8272A which
make DMA operation easy to incorporate with the aid of
an external DMA Controller chip, such as the 8237 A. The
FDC
will operate in either DMA or Non-DMA mode, In
the Non-DMA mode, the FDC generates interrupts to the
processor for every transfer of a data byte between the
CPU and the 8272A. In the DMA mode, the processor
need only load a command into the FDC and all data
transfers occur under control of the 8272A and DMA
controller.
6-226
AFN-Ol259C

Tandy 1000 Specifications

General

Processor	Intel 8088
Processor Speed	4.77 MHz
RAM	128 KB (expandable to 640 KB)
Operating System	MS-DOS 2.11
Manufacturer	Tandy Corporation
Release Year	1984
Storage	Single or double 5.25" floppy disk drive (360 KB), optional hard drive
Sound	Tandy 3-voice sound
Ports	Parallel, Serial
Graphics	CGA (Color Graphics Adapter)
Graphics Modes	320x200, 640x200