Circuit Description-455/A2/B2
CHANNEL 1 AND CHANNEL 2
INPUT CIRCUITS ^
The Input circuits are composed of the Scale Factor Con
trol, Input Coupling and Attenuators, and the FET Input
Source Follower. The Channel 1 and Channel 2 input cir
cuits are identical, therefore, only the channel 1 circuit is
discussed in detail.
Scale Factor Control
Scale factor indicators light when +5 volts is applied to the
emitters of Q4114-Q4116 and/or Q4214-Q4216 by the
VERT MODE switch.
When CH 1 pushbutton is pushed, +5 volts is disconnected
from the channel 2 circuit and when CH 2 pushbutton is
pushed, +5 volts is disconnected from the channel 1 circuit.
Both circuits are connected to +5 volts when the VERT
MODE switch is in any of the other modes.
When the CH 2 pushbutton is out, +5 volts is applied to the
emitters of Q4114 and Q4116. If no probe or a 1X probe
is connected to the CH 1 input connector, Q4116 conducts
and turns on the IX scale factor light-emitting diode (LED)
CR4117. If a 10X probe with a scale-switching connector
is connected to the CH 1 input connector, R4112 is ground
ed (through 11 k£2 resistor in probe) and Q4114 is biased
into conduction. This turns on the 10X LED CR4115,
biases off Q4116, and turns off CR4117.
Input Coupling and Volts/Division Switching
The Channel 1 and Channel 2 Input Coupling, Attenu
ator, and Gain Switching circuits A4100 (CH 1), A4200
(CH 2), A4162 (CH 1), and A4262 (CH 2) are made up of
thick-film resistors on ceramic substrate.
Signals applied to the input connector can be ac-coupled,
dc-coupled, or internally disconnected from the input to
the Preamplifier circuit. When the Input Switch S4100A is
set to DC, the input signal is coupled directly to the attenu
ator. When set to AC, the input signal passes through C4100A
on its way to the attenuator. The capacitor blocks the dc
component of the signal. In the GND position, the signal
path to the attenuator is open and the input to the attenu
ator is grounded. This provides a ground reference without
disconnecting the input signal from the input connector.
Resistor R4100A allows C4100A to precharge in the GND
position so that the trace remains on screen when switched
to the AC position.
The effective overall deflection factor of each channel is
determined by the VOLTS/DIV switch setting. The basic
deflection factor of the vertical deflection system is 5 m V/
div. A t this setting, no attenuators are switched in and the
Preamplifier gain is set to maximum by the Gain Switching
circuit. To achieve the complete range of deflection factors
indicated on the front panel, precision attenuators are
switched in and out of the Attenuator and Gain Switching
circuits.
The VOLTS/DIV control operates the attenuator switch
(S4100B) contacts and the vertical gain switch (S4162)
contacts from a single switch cam.
The Attenuator circuit consists of a 10X and a 100X attenu
ator. An attenuation factor of 1000X is obtained when the
10X and 100X attenuators are cascaded.
The Gain Switching circuit consists of two 2X gain-reduction
networks. A gain reduction of 4X is obtained when both
2X networks are switched in simultaneously.
Figure 4-3 illustrates attenuator and gain switching sequences.
FET Input Source Follower
The Channel 1 signal from the Input Attenuator is connected
to the source follower Q4124A through R4123 and C4123.
Resistor R4122 provides the 1 M£2 input resistance for this
channel. Resistor R4123 limits the current drive to the gate
of Q4124A when a high-amplitude negative-going signal is
applied to the CH 1 OR X input connector. Transistor
Q4124B provides a constant current source for Q4124A.
VERTICAL PREAMPLIFIER AND
SWITCHING ^
The Preamplifier circuit provides the initial stages of signal
amplification. The Channel Switching circuit determines
whether the Channel 1 and/or Channel 2 signals are connect
ed to the Vertical Output Amplifier. In the alternate and
chopped modes of operation, both channels are displayed
alternately on a time-sharing basis.
Preamplifier and Channel Switching Gates
Channel 1 and Channel 2 Preamplifiers and switching gates
are contained within a single hybrid integrated circuit (HIC),
U4160. Outputs from U4160 provide triggering signals to
the Horizontal Module and the CH 2 OUT signal to the
Main Module.
REV. A, OCT 1975 4-7
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