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Tektronix PS 5010 - Page 207

Tektronix PS 5010
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KERNEL
TEST-ROM VERIFICATION
I. Purpose
Verifies that correct and functioning ROMs are installed. This test can also find misplaced ROMs.
The data bus is checked for stuck-at-zero or stuck-at-one states.
II. Equipment required
A. Tektronix SA 501 Signature Analyzer (or equivalent with qualify input)
B. Two 16-pin DIP clips, Tektronix Part Number 003-0709-00 or equivalent
C. TM 500 Flexible Extenders, Tektronix Part Number 067-0645-02.
Ill. Electrical conditions necessary to perform test
A. 02,
m,
CPU, address lines and address decoding functional. Verify with kernel test for CPU,
address lines and address decoding.
B. C/O ROM Enable and E/F ROM Enable working (U1120, pins
9
and 7). Verify with CPU, address
lines and address decoding kernel test.
C. C ROM Enable, D ROM Enable, E ROM Enable, F ROM Enable working (U1310, pins 4, 5, 6,
and 7). Verify with CPU, address lines, and address decoding kernel test.
IV. Setup
A. PS 5010 (set conditions with power off)
1. Place PS 501 0 on flexible extenders
2. Set GPlB address switch (S1221) as shown.
Press
3. Set runlforce data jumper (J1220) as shown.
rZ]
Force data
4.
Remove R1211 (data bus jumper).
5. Set mode jumper (J1320) as shown.
F]
Signature mode
B.
Signature analyzer
Connect and set as follows:
Threshold
=
TTL
Start
=
I
Connect to U1120, pin
7
or pin 9 (see chart)
Stop
=
I
Connect to U1120, pin 7 or pin 9 (see chart)
Clock
=
I
Connect to 02 test point, Jl 1 1 1. pin
2
(clock)
Qua1
=
1
Connect to Ul3lO (see chart). Set QUAL to
ON.
Gnd
=
Connect to ground test point (TP1011)

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