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Tektronix PS 5010 - Page 212

Tektronix PS 5010
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FIRMWARE
SIGNATURE
ANALYSIS-GPIB CHIP
TEST
(U1
00
I
)
I. Purpose
Use this test to determine if GPlB chip (U1001) is causing data bus signature errors.
11.
Equipment Required
A. Tektronix SA 501 Signature Analyzer (or equivalent)
B. Two TM 500 Flexible Extenders, Tektronix Part Number 067-0645-02
C. 16-pin DIP clip, Tektronix Part Number 003-0709-00
Ill. Electrical conditions necessary to perform test
A. CPU,
ROM,
and
RAM
address and data lines functional (verified by power-up self test).
B.
Chip select for GPlB chip functional (U1120, pin 11). Check U1120 pin 11 for pulses approxi-
mately 5.5 ms apart (low true).
IV. Setup
PS 501 0 (on extenders):
A. Set mode jumper (J1320) as shown
Signature mode
8.
Set runlforce data jumper (J1220) as shown
C. Signature analyzer
Connect to CPU board and set as follows:
Threshold
=
TTL
Start
=
-L
Connect to U1120, pin 11 via
DIP
clip
Stop
=
I
Connect to U1120, pin 1 1 via
DIP
clip
Clock
=
I
Connect to 42, J1111, pin 2 (clock)
Gnd
=
Connect to ground test point (TP1011)
V. Measurements
Verify setup by taking signature on +5 V test point. Read data bus by checking pins 1 through
8
on
R1211 (data bus jumper).
ICI3-I,-IL-I~II-l0-
t
All
data
lines should
read
0000
@@@I@@@@@
i-5
V
test point 0001
1
R1211
]
?@%@a@@@
-2-1
A-S-b-7-a
DDDDDDDD
1
I
CPU
board
Fig.
9-6.

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