ME310G1 Hardware Design Guide
1VV0301588 Rev. 16 Page 20 of 95 2021-10-27
3 PINS ALLOCATION
3.1 Pin-out
USB HS 2.0 Communication Port
USB differential Data (+)
USB differential Data (-)
Asynchronous Serial Port (USIF0) – Prog. / Data + HW Flow Control
Serial data input (TXD) from
DTE
Serial data output (RXD) to DTE
Input for Request to send signal
(RTS) from DTE
Output for Clear to send signal
(CTS) to DTE
Asynchronous Serial Port (USIF1)
Serial data input (TXD) from
DTE
Serial data output (RXD) to DTE
MUST NOT BE
“HIGH” at boot
Input for Request to send signal
(RTS) from DTE
Output for Clear to send signal
(CTS) to DTE
Auxiliary UART (TX Data to DTE)
Auxiliary UART (RX Data to DTE)
External SIM signal – Clock
External SIM signal – Reset
External SIM signal – Data I/O