Telit Wireless Solutions ME310G1 - Logic Levels

ME310G1 Hardware Design Guide
1VV0301588 Rev. 16 Page 36 of 95 2021-10-27
Not Subject to NDA
5 DIGITAL SECTION
ME310G1 has four main operation states:
• OFF state: VBATT is applied and only RTC is running. The Baseband is switched
OFF and the only possible change is the ON state.
• ON state: The baseband is fully switched on and the module is ready to accept
AT commands. The module may be idle or connected.
• Sleep mode state: The main baseband processor is intermittently switched ON
and AT commands may be processed with some latency. The module is idle
with low current consumption.
• Deep sleep mode state: PSM is defined in 3GPP release 12. The baseband is
switched OFF most of the time.
5.1 Logic Levels
Table 23: Logic levels Minimum and maximum
Table 24: Logic levels average
Parameter
Min
Max
ABSOLUTE MAXIMUM RATINGS – NOT FUNCTIONAL
Input level on any digital pin (CMOS 1.8) with respect to ground
-0.3V
2.1V
Operating Range - Interface levels (1.8V CMOS)
Input high level
1.5V
1.9V
Input low level
0V
0.35V
Output high level
1.6V
1.9V
Output low level
0V
0.2V
Parameter
Max
Current characteristics:
Output Current
1mA
Input Current
1uA