AM3359, AM3358, AM3357, AM3356, AM3354, AM3352
SPRS717H –OCTOBER 2011–REVISED MAY 2015
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Table 4-1. Pin Attributes (ZCE and ZCZ Packages) (continued)
BALL RESET BUFFER PULLUP
ZCE BALL ZCZ BALL TYPE BALL RESET RESET REL. ZCE POWER / HYS
PIN NAME [2] SIGNAL NAME [3] MODE [4] REL. STATE STRENGTH /DOWN TYPE I/O CELL [13]
NUMBER [1] NUMBER [1] [5] STATE [6] MODE [8] ZCZ POWER [9] [10]
[7] (mA) [11] [12]
V12 R8 GPMC_AD2 gpmc_ad2 0 I/O L L 7 VDDSHV1 / Yes 6 PU/PD LVCMOS
VDDSHV1
mmc1_dat2 1 I/O
gpio1_2 7 I/O
W13 T8 GPMC_AD3 gpmc_ad3 0 I/O L L 7 VDDSHV1 / Yes 6 PU/PD LVCMOS
VDDSHV1
mmc1_dat3 1 I/O
gpio1_3 7 I/O
V13 U8 GPMC_AD4 gpmc_ad4 0 I/O L L 7 VDDSHV1 / Yes 6 PU/PD LVCMOS
VDDSHV1
mmc1_dat4 1 I/O
gpio1_4 7 I/O
W14 V8 GPMC_AD5 gpmc_ad5 0 I/O L L 7 VDDSHV1 / Yes 6 PU/PD LVCMOS
VDDSHV1
mmc1_dat5 1 I/O
gpio1_5 7 I/O
U14 R9 GPMC_AD6 gpmc_ad6 0 I/O L L 7 VDDSHV1 / Yes 6 PU/PD LVCMOS
VDDSHV1
mmc1_dat6 1 I/O
gpio1_6 7 I/O
W15 T9 GPMC_AD7 gpmc_ad7 0 I/O L L 7 VDDSHV1 / Yes 6 PU/PD LVCMOS
VDDSHV1
mmc1_dat7 1 I/O
gpio1_7 7 I/O
V15 U10 GPMC_AD8 gpmc_ad8 0 I/O L L 7 VDDSHV1 / Yes 6 PU/PD LVCMOS
VDDSHV2
lcd_data23 1 O
mmc1_dat0 2 I/O
mmc2_dat4 3 I/O
ehrpwm2A 4 O
pr1_mii_mt0_clk 5 I
gpio0_22 7 I/O
W16 T10 GPMC_AD9 gpmc_ad9 0 I/O L L 7 VDDSHV1 / Yes 6 PU/PD LVCMOS
VDDSHV2
lcd_data22 1 O
mmc1_dat1 2 I/O
mmc2_dat5 3 I/O
ehrpwm2B 4 O
pr1_mii0_col 5 I
gpio0_23 7 I/O
26 Terminal Configuration and Functions Copyright © 2011–2015, Texas Instruments Incorporated
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