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SPRS717H –OCTOBER 2011–REVISED MAY 2015
Table 4-1. Pin Attributes (ZCE and ZCZ Packages) (continued)
BALL RESET BUFFER PULLUP
ZCE BALL ZCZ BALL TYPE BALL RESET RESET REL. ZCE POWER / HYS
PIN NAME [2] SIGNAL NAME [3] MODE [4] REL. STATE STRENGTH /DOWN TYPE I/O CELL [13]
NUMBER [1] NUMBER [1] [5] STATE [6] MODE [8] ZCZ POWER [9] [10]
[7] (mA) [11] [12]
T12 T11 GPMC_AD10 gpmc_ad10 0 I/O L L 7 VDDSHV1 / Yes 6 PU/PD LVCMOS
VDDSHV2
lcd_data21 1 O
mmc1_dat2 2 I/O
mmc2_dat6 3 I/O
ehrpwm2_tripzone_input 4 I
pr1_mii0_txen 5 O
gpio0_26 7 I/O
U12 U12 GPMC_AD11 gpmc_ad11 0 I/O L L 7 VDDSHV1 / Yes 6 PU/PD LVCMOS
VDDSHV2
lcd_data20 1 O
mmc1_dat3 2 I/O
mmc2_dat7 3 I/O
ehrpwm0_synco 4 O
pr1_mii0_txd3 5 O
gpio0_27 7 I/O
U13 T12 GPMC_AD12 gpmc_ad12 0 I/O L L 7 VDDSHV1 / Yes 6 PU/PD LVCMOS
VDDSHV2
lcd_data19 1 O
mmc1_dat4 2 I/O
mmc2_dat0 3 I/O
eQEP2A_in 4 I
pr1_mii0_txd2 5 O
pr1_pru0_pru_r30_14 6 O
gpio1_12 7 I/O
T13 R12 GPMC_AD13 gpmc_ad13 0 I/O L L 7 VDDSHV1 / Yes 6 PU/PD LVCMOS
VDDSHV2
lcd_data18 1 O
mmc1_dat5 2 I/O
mmc2_dat1 3 I/O
eQEP2B_in 4 I
pr1_mii0_txd1 5 O
pr1_pru0_pru_r30_15 6 O
gpio1_13 7 I/O
W17 V13 GPMC_AD14 gpmc_ad14 0 I/O L L 7 VDDSHV1 / Yes 6 PU/PD LVCMOS
VDDSHV2
lcd_data17 1 O
mmc1_dat6 2 I/O
mmc2_dat2 3 I/O
eQEP2_index 4 I/O
pr1_mii0_txd0 5 O
pr1_pru0_pru_r31_14 6 I
gpio1_14 7 I/O
Copyright © 2011–2015, Texas Instruments Incorporated Terminal Configuration and Functions 27
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