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SPRS717H –OCTOBER 2011–REVISED MAY 2015
Table 4-1. Pin Attributes (ZCE and ZCZ Packages) (continued)
BALL RESET BUFFER PULLUP
ZCE BALL ZCZ BALL TYPE BALL RESET RESET REL. ZCE POWER / HYS
PIN NAME [2] SIGNAL NAME [3] MODE [4] REL. STATE STRENGTH /DOWN TYPE I/O CELL [13]
NUMBER [1] NUMBER [1] [5] STATE [6] MODE [8] ZCZ POWER [9] [10]
[7] (mA) [11] [12]
V14 U9 GPMC_CSn1 gpmc_csn1 0 O H H 7 VDDSHV1 / Yes 6 PU/PD LVCMOS
VDDSHV1
gpmc_clk 1 I/O
mmc1_clk 2 I/O
pr1_edio_data_in6 3 I
pr1_edio_data_out6 4 O
pr1_pru1_pru_r30_12 5 O
pr1_pru1_pru_r31_12 6 I
gpio1_30 7 I/O
U15 V9 GPMC_CSn2 gpmc_csn2 0 O H H 7 VDDSHV1 / Yes 6 PU/PD LVCMOS
VDDSHV1
gpmc_be1n 1 O
mmc1_cmd 2 I/O
pr1_edio_data_in7 3 I
pr1_edio_data_out7 4 O
pr1_pru1_pru_r30_13 5 O
pr1_pru1_pru_r31_13 6 I
gpio1_31 7 I/O
U17 T13 GPMC_CSn3
(6)
gpmc_csn3 0 O H H 7 VDDSHV1 / Yes 6 PU/PD LVCMOS
VDDSHV2
gpmc_a3 1 O
rmii2_crs_dv 2 I
mmc2_cmd 3 I/O
pr1_mii0_crs 4 I
pr1_mdio_data 5 I/O
EMU4 6 I/O
gpio2_0 7 I/O
W9 T7 GPMC_OEn_REn gpmc_oen_ren 0 O H H 7 VDDSHV1 / Yes 6 PU/PD LVCMOS
VDDSHV1
timer7 2 I/O
gpio2_3 7 I/O
R15 T17 GPMC_WAIT0 gpmc_wait0 0 I H H 7 VDDSHV1 / Yes 6 PU/PD LVCMOS
VDDSHV3
gmii2_crs 1 I
gpmc_csn4 2 O
rmii2_crs_dv 3 I
mmc1_sdcd 4 I
pr1_mii1_col 5 I
uart4_rxd 6 I
gpio0_30 7 I/O
U8 U6 GPMC_WEn gpmc_wen 0 O H H 7 VDDSHV1 / Yes 6 PU/PD LVCMOS
VDDSHV1
timer6 2 I/O
gpio2_4 7 I/O
Copyright © 2011–2015, Texas Instruments Incorporated Terminal Configuration and Functions 29
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