Lab 7: Event Manager
24. Run the code in real-time mode. Notice the values for CAP_rising and CAP_falling
(ignore the
CAP_duty value until step 25). Then fully halt the DSP.
Questions:
•
Which GP Timer is being used to clock the PWM1?
• Which GP Timer is being used as the Capture 1 timebase?
• How do the captured values for CAP_rising and CAP_falling relate to the compare
register setting for PWM1?
• How can the differences be accounted for?
Modify Program for Duty Cycle Measurement
25. In order to accurately compute the duty cycle of the PWM signal, we need to configure
Capture Unit 1 to use GP Timer 2 as its timebase, rather than GP Timer 1. GP Timer 1
cannot be used for this, since it is being run in continuous up/down-counting mode,
whereas GP Timer 2 is running in continuous up-counting mode. (Think of Timer 1 as a
clock that runs from 12PM to 6AM, and that runs backwards to 12PM again. It wouldn't
be a good clock to use for measuring the length of an event if you simply wanted to
subtract the starting time from the ending time!)
Edit
Ev_7_8_9_10.c as required so that Capture 1 uses GP Timer 2 as its timebase.
26. We also need to increase the period of Timer 2. The width of the active portion of the
25% duty, 2 kHz PWM, is 125
µsec. However, in Ev_7_8_9_10.c, the line
“#define ADC_sample_period 2999”
gives Timer 2 a period of 3000
SYSCLKOUT cycles (equivalent to 50 kHz, or a 20
µsec period). It would be difficult to
use Timer 2 to measure the duty (To understand why, here is as an analogy. Suppose
someone hands you a stopwatch that can record only 1 minute of elapsed time before
rolling over, but asks you to use this watch to measure the length of a 1 hour meeting.
You would need to manually keep track of how many times the stopwatch had rolled
over at the 1 minute mark, which would be inefficient. It would be better to use a watch
that could record up to an hour!). It turns out that the easiest thing to do on a 16-bit
microprocessor is to use a timer that rolls over at 16bits. Then, all we need to do is
subtract the start time from the end time using 2's complement math, and we get the
elapsed time. By rolling over at 16 bits, we do not care if the elapsed time includes a
timer rollover (as long as only one such rollover has occurred).
In
Ev_7_8_9_10.c change the “ADC_sample_period” to “0xffff”.
Note: This will have the side effect of making the ADC sampling rate only 2.3 kHz.
However, we are done using the ADC in this lab, so it is not a concern.
Build and Load
27. Save all changes to the files and click the “Build” button.
28. Reset the DSP.
7 - 40 C28x - Event Manager
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