Table 6-3. Signal Descriptions (continued)
FUNCTION
SIGNAL
NAME
PIN NO.
(1)
PIN TYPE
(2)
DESCRIPTION
64 PM
48 PT,
RGZ
32
RHB
28
DGS28
Comparator
COMP0_IN0- 31 47 31 2 I Comparator 0 inverting input 0
COMP0_IN0+ 30 46 30 1 I Comparator 0 non-inverting input 0
COMP0_IN1- 10 32 21 20 I Comparator 0 inverting input 1
COMP0_IN1+ 11 33 22 21 I Comparator 0 non-inverting input 1
COMP0_IN2- 6 28 17 – I Comparator 0 inverting input 2
COMP0_IN2+ 7 29 18 17 I Comparator 0 non-inverting input 2
COMP0_IN3+ 8 30 19 18 I Comparator 0 non-inverting input 3
COMP0_OUT
22
49
57
13
19
11
15
16 O Comparator 0 output
COMP1_IN0- 29 – – – I Comparator 1 inverting input 0
COMP1_IN0+ 28 – – – I Comparator 1 non-inverting input 0
COMP1_IN1- 24 43 27 26 I Comparator 1 inverting input 1
COMP1_IN1+ 23 42 – – I Comparator 1 non-inverting input 1
COMP1_IN2- 14 36 – – I Comparator 1 inverting input 2
COMP1_IN2+ 15 37 – – I Comparator 1 non-inverting input 2
COMP1_IN3+ 8 30 19 18 I Comparator 1 non-inverting input 3
COMP1_OUT
43
60
62
9
22
7 10 O Comparator 1 output
COMP2_IN0- 21 – – – I Comparator 2 inverting input 0
COMP2_IN0+ 20 – – – I Comparator 2 non-inverting input 0
COMP2_IN1- 17 39 25 24 I Comparator 2 inverting input 1
COMP2_IN1+ 16 38 – – I Comparator 2 non-inverting input 1
COMP2_OUT
9
16
29
31
38
20 19 O Comparator 2 output
DAC DAC_OUT 8 30 19 18 O DAC output
Debug
SWCLK 13 35 24 23 I Serial wire debug input clock
SWDIO 12 34 23 22 I/O Serial wire debug data input/output
FCC FCC_IN
5
9
33
45
1
11
27
31
1
9
16
20
4
12
19
I Frequency clock counter input
General-
Purpose
Amplifier
GPAMP_IN+ 30 46 30 1 I GPAMP non-inverting terminal input
GPAMP_IN- 11 33 22 21 I GPAMP inverting terminal input
GPAMP_OUT 18 40 26 25 O GPAMP output
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MSPM0G3507, MSPM0G3506, MSPM0G3505
SLASEX6A – FEBRUARY 2023 – REVISED JUNE 2023
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