Texas Instruments TMS320C6748 - Page 116

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TMS320C6748
SPRS590G –JUNE 2009–REVISED JANUARY 2017 www.ti.com
Table 6-22. Switching Characteristics for EMIFA Asynchronous Memory Interface
(1) (2) (3)
(continued)
NO. PARAMETER
1.3V, 1.2V, 1.1V, 1.0V
UNIT
MIN Nom MAX
22 t
su(EMAV-EMWEL)
Output setup time, EMA_A[13:0] valid to EMA_WE low (WS)*E-3 (WS)*E (WS)*E+3 ns
23 t
h(EMWEH-EMAIV)
Output hold time, EMA_WE high to EMA_A[13:0] invalid (WH)*E-3 (WH)*E (WH)*E+3 ns
24 t
w(EMWEL)
EMA_WE active low width (EW = 0) (WST)*E-3 (WST)*E (WST)*E+3 ns
EMA_WE active low width (EW = 1) (WST+EWC)*E-3 (WST+EWC)*E (WST+EWC)*E+3 ns
25 t
d(EMWAITH-EMWEH)
Delay time from EMA_WAIT deasserted to EMA_WE high 3E-3 4E 4E+3 ns
26 t
su(EMDV-EMWEL)
Output setup time, EMA_D[15:0] valid to EMA_WE low (WS)*E-3 (WS)*E (WS)*E+3 ns
27 t
h(EMWEH-EMDIV)
Output hold time, EMA_WE high to EMA_D[15:0] invalid (WH)*E-3 (WH)*E (WH)*E+3 ns
30 t
su(EMARW-EMWEL)
Output setup time, EMA_A_RW valid to EMA_WE low (WS)*E-3 (WS)*E (WS)*E+3 ns
31 t
h(EMWEH-EMARW)
Output hold time, EMA_WE high to EMA_A_RW invalid (WH)*E-3 (WH)*E (WH)*E+3 ns