MASTER MODE 4 PIN WITH CHIP SELECT
SPIx_CLK
SPIx_SIMO
SPIx_SOMI
SPIx_ENA
SPIx_CLK
SPIx_SIMO
SPIx_SOMI
SPIx_SCS
SPIx_CLK
SPIx_SIMO
SPIx_SOMI
SPIx_ENA
SPIx_SCS
MO(0)
MO(1)
MO(n−1)
MO(n)
MI(0) MI(1) MI(n−1) MI(n)
MO(0)
MO(1)
MO(n−1)
MO(n)
MI(0) MI(1) MI(n−1) MI(n)
MO(0)
MO(1)
MO(n−1)
MO(n)
MI(0) MI(1) MI(n−1) MI(n)
17
19
21
22
23
20
18
20
18
MASTER MODE 4 PIN WITH ENABLE
MASTER MODE 5 PIN
A. DESELECTED IS PROGRAMMABLE EITHER HIGH OR
3−STATE (REQUIRES EXTERNAL PULLUP)
DESEL
(A)
DESEL
(A)
180
TMS320C6748
SPRS590G –JUNE 2009–REVISED JANUARY 2017
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Peripheral Information and Electrical Specifications Copyright © 2009–2017, Texas Instruments Incorporated
Figure 6-40. SPI Timings—Master Mode (4-Pin and 5-Pin)