Table 3-3. Digital Connections by System Feature
Device
GPIO Mapping System Features
(1)
PMIC Pin
NVM
Function
PDN Signals
Active
SoC
Functiona
l Safety
MCU -
only
MCU-
Safety
Island
GPIO
Retention
DDR
Retention
SD Card
TPS65941
120-Q1
nPWRON/
ENABLE
Enable SOC_PWR_ON R
INT INT H_MCU_INTn R
nRSTOUT nRSTOUT H_MCU_PORz_1V8 R R
SCL_I2C1 SCL_I2C1 H_WKUP_I2C0 R
SDA_I2C1 SDA_I2C1 H_WKUP_I2C0 R
GPIO_1 SCL_I2C2 H_MCU_I2C0_SCL R
GPIO_2 SDA_I2C2 H_MCU_I2C0_SDA R
GPIO_3
nERR_So
C
H_SOC_SAFETY_ERRn R
GPIO_4
LP_WKUP
1
(2)
PMIC_FULL_ACTIVEn R R
GPIO_5
SCLK_SP
MI
PMICA_SCLK R
GPIO_6
SDATA_S
PMI
PMICA_SDATA R
GPIO_7
nERR_MC
U
H_MCU_SAFETY_ERRn R
GPIO_8
DISABLE_
WDOG
PMICA_GPIO8
(4) (4)
GPIO_9 GPO EN_MCU3V3IO R R
GPIO_10 WKUP1
PMICA_GPIO10/
H_PMIC_PWR_EN1
O
GPIO_11
nRSTOUT
_SOC
H_SOC_PORz_1V8 R
TPS65941
421-Q1
nPWRON/
ENABLE
ENABLE Unused
nINT nINT H_MCU_INTn
nRSTOUT nRSTOUT Unused
SCL_I2C1 SCL_I2C1 H_WKUP_I2C0 R
SDA_I2C1 SCL_I2C1 H_WKUP_I2C0 R
GPIO_1 GPO Unused
(5)
GPIO_2 GPI Unused
(3)
R
GPIO_3 GPO EN_DDR_VDD1 R O R
GPIO_4 GPO H_DDR_RET_1V1 R
GPIO_5
SCLK_SP
MI
PMICB_SCLK R
GPIO_6
SDATA_S
PMI
PMICB_SDATA R
GPIO_7 GPI Unused
(5)
GPIO_8 GPI Unused
(5)
GPIO_9 GPO EN_EFUSE_LDO
(5)
GPIO_10 WKUP2 WK_MCU_ONLYn
(5)
O
GPIO_11 GPO EN_3V3IO R
Processor Connections www.ti.com
10 TPS65941120-Q1, TPS65941421-Q1 and LP876411B5-Q1 PMIC User Guide
for J721S2, PDN-0A
SLVUCJ9 – FEBRUARY 2023
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