Table 5-8. Interrupt NVM Settings
Register Name Field Name
TPS65941120-Q1 TPS65941421-Q1 LP876411B5-Q1
Value Description Value Description Value Description
FSM_TRIG_MAS
K_1
GPIO1_FSM_MA
SK
0x1 Masked 0x1 Masked 0x1 Masked
GPIO1_FSM_MA
SK_POL
0x0 Low; Masking sets
signal value to '0'
0x0 Low; Masking sets
signal value to '0'
0x0 Low; Masking sets
signal value to '0'
GPIO2_FSM_MA
SK
0x1 Masked 0x1 Masked 0x1 Masked
GPIO2_FSM_MA
SK_POL
0x0 Low; Masking sets
signal value to '0'
0x0 Low; Masking sets
signal value to '0'
0x0 Low; Masking sets
signal value to '0'
GPIO3_FSM_MA
SK
0x1 Masked 0x1 Masked 0x1 Masked
GPIO3_FSM_MA
SK_POL
0x0 Low; Masking sets
signal value to '0'
0x0 Low; Masking sets
signal value to '0'
0x0 Low; Masking sets
signal value to '0'
GPIO4_FSM_MA
SK
0x1 Masked 0x1 Masked 0x1 Masked
GPIO4_FSM_MA
SK_POL
0x0 Low; Masking sets
signal value to '0'
0x0 Low; Masking sets
signal value to '0'
0x0 Low; Masking sets
signal value to '0'
FSM_TRIG_MAS
K_2
GPIO5_FSM_MA
SK
0x1 Masked 0x1 Masked 0x1 Masked
GPIO5_FSM_MA
SK_POL
0x0 Low; Masking sets
signal value to '0'
0x0 Low; Masking sets
signal value to '0'
0x0 Low; Masking sets
signal value to '0'
GPIO6_FSM_MA
SK
0x1 Masked 0x1 Masked 0x1 Masked
GPIO6_FSM_MA
SK_POL
0x0 Low; Masking sets
signal value to '0'
0x0 Low; Masking sets
signal value to '0'
0x0 Low; Masking sets
signal value to '0'
GPIO7_FSM_MA
SK
0x1 Masked 0x1 Masked 0x1 Masked
GPIO7_FSM_MA
SK_POL
0x0 Low; Masking sets
signal value to '0'
0x0 Low; Masking sets
signal value to '0'
0x0 Low; Masking sets
signal value to '0'
GPIO8_FSM_MA
SK
0x1 Masked 0x1 Masked 0x1 Masked
GPIO8_FSM_MA
SK_POL
0x0 Low; Masking sets
signal value to '0'
0x0 Low; Masking sets
signal value to '0'
0x0 Low; Masking sets
signal value to '0'
FSM_TRIG_MAS
K_3
GPIO9_FSM_MA
SK
0x1 Masked 0x1 Masked 0x1 Masked
GPIO9_FSM_MA
SK_POL
0x0 Low; Masking sets
signal value to '0'
0x0 Low; Masking sets
signal value to '0'
0x0 Low; Masking sets
signal value to '0'
GPIO10_FSM_M
ASK
0x1 Masked 0x1 Masked 0x1 Masked
GPIO10_FSM_M
ASK_POL
0x0 Low; Masking sets
signal value to '0'
0x0 Low; Masking sets
signal value to '0'
0x0 Low; Masking sets
signal value to '0'
GPIO11_FSM_M
ASK
0x1 Masked 0x1 Masked
GPIO11_FSM_M
ASK_POL
0x0 Low; Masking sets
signal value to '0'
0x0 Low; Masking sets
signal value to '0'
Static NVM Settings www.ti.com
24 TPS65941120-Q1, TPS65941421-Q1 and LP876411B5-Q1 PMIC User Guide
for J721S2, PDN-0A
SLVUCJ9 – FEBRUARY 2023
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