Table 5-8. Interrupt NVM Settings (continued)
Register Name Field Name
TPS65941120-Q1 TPS65941421-Q1 LP876411B5-Q1
Value Description Value Description Value Description
MASK_MISC TWARN_MASK 0x0 Interrupt generated 0x0 Interrupt generated 0x0 Interrupt generated
BIST_PASS_MA
SK
0x0 Interrupt generated 0x0 Interrupt generated 0x0 Interrupt generated
EXT_CLK_MASK 0x1 Interrupt not
generated.
0x1 Interrupt not
generated.
0x1 Interrupt not
generated.
MASK_MODERA
TE_ERR
BIST_FAIL_MAS
K
0x0 Interrupt generated 0x0 Interrupt generated 0x0 Interrupt generated
REG_CRC_ERR
_MASK
0x0 Interrupt generated 0x0 Interrupt generated 0x0 Interrupt generated
SPMI_ERR_MAS
K
0x0 Interrupt generated 0x0 Interrupt generated 0x0 Interrupt generated
NPWRON_LONG
_MASK
0x1 Interrupt not
generated.
0x1 Interrupt not
generated.
NINT_READBAC
K_MASK
0x0 Interrupt generated 0x0 Interrupt generated 0x0 Interrupt generated
NRSTOUT_REA
DBACK_ MASK
0x0 Interrupt generated 0x1 Interrupt not
generated.
0x1 Interrupt not
generated.
MASK_FSM_ER
R
IMM_SHUTDOW
N_MASK
0x0 Interrupt generated 0x0 Interrupt generated 0x0 Interrupt generated
MCU_PWR_ERR
_MASK
0x0 Interrupt generated 0x0 Interrupt generated 0x0 Interrupt generated
SOC_PWR_ERR
_MASK
0x0 Interrupt generated 0x0 Interrupt generated 0x0 Interrupt generated
ORD_SHUTDOW
N_MASK
0x0 Interrupt generated 0x0 Interrupt generated 0x0 Interrupt generated
MASK_COMM_E
RR
COMM_FRM_ER
R_MASK
0x0 Interrupt generated 0x0 Interrupt generated 0x0 Interrupt generated
COMM_CRC_ER
R_MASK
0x0 Interrupt generated 0x0 Interrupt generated 0x0 Interrupt generated
COMM_ADR_ER
R_MASK
0x0 Interrupt generated 0x0 Interrupt generated 0x0 Interrupt generated
I2C2_CRC_ERR
_MASK
0x0 Interrupt generated 0x0 Interrupt generated 0x0 Interrupt generated
I2C2_ADR_ERR_
MASK
0x0 Interrupt generated 0x0 Interrupt generated 0x0 Interrupt generated
MASK_READBA
CK_ERR
EN_DRV_READB
ACK_ MASK
0x0 Interrupt generated 0x1 Interrupt not
generated.
0x1 Interrupt not
generated.
NRSTOUT_SOC
_
READBACK_MA
SK
0x0 Interrupt generated 0x1 Interrupt not
generated.
0x1 Interrupt not
generated.
MASK_ESM ESM_SOC_PIN_
MASK
0x0 Interrupt generated 0x1 Interrupt not
generated.
ESM_SOC_RST_
MASK
0x0 Interrupt generated 0x1 Interrupt not
generated.
ESM_SOC_FAIL
_MASK
0x0 Interrupt generated 0x1 Interrupt not
generated.
ESM_MCU_PIN_
MASK
0x0 Interrupt generated 0x1 Interrupt not
generated.
0x1 Interrupt not
generated.
ESM_MCU_RST
_MASK
0x0 Interrupt generated 0x1 Interrupt not
generated.
0x1 Interrupt not
generated.
ESM_MCU_FAIL
_MASK
0x0 Interrupt generated 0x1 Interrupt not
generated.
0x1 Interrupt not
generated.
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SLVUCJ9 – FEBRUARY 2023
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