28 www.xilinx.com RocketIO™ Transceiver User Guide
UG024 (v3.0) February 22, 2007
Chapter 1: RocketIO Transceiver Overview
R
TXUSRCLK2 I 1 Clock output from a DCM that clocks transmission data and status and
reconfiguration data between the transceiver an the FPGA core. The
ratio between TXUSRCLK and TXUSRCLK2 depends on the width of
TXDATA.
Notes:
1. The GT_CUSTOM ports are always the maximum port size.
2. GT_FIBRE_CHAN and GT_ETHERNET ports do not have the three CHBOND** or ENCHANSYNC ports.
3. The port size changes with relation to the primitive selected, and also correlates to the byte mapping.
4. External ports only accessible from package pins.
Table 1-5: GT_CUSTOM
(1)
, GT_AURORA, GT_FIBRE_CHAN
(2)
, GT_ETHERNET
(2)
,
GT_INFINIBAND, and GT_XAUI Primitive Ports (Continued)
Port I/O
Port
Size
Definition
Product Not Recommended for New Designs
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