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Xilinx Zynq UltraScale+ ZCU208 - Page 36

Xilinx Zynq UltraScale+ ZCU208
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PMU GPO (MIO 32-37)
The plaorm management unit (PMU) within the Zynq UltraScale+ RFSoC signals power domain
changes using the PMU output pins for deep-sleep mode. The Zynq UltraScale+ RFSoC PMU
GPO pins are connected to inputs of the MSP430 system controller through the TXS0108E level-
shier U37. The RFSoC U1 Bank 501 and MSP430 U38 pin numbers are listed in the following
table.
Table 14: XCZU48DR to MSP430 Connections
XCZU48DR (U1) Pin Net Name
MSP430 U38
Pin Name Pin Number
E32 MIO37_PMU_GPO5 P1_0 13
E31 MIO36_PMU_GPO4 P1_1 14
C33 MIO35_PMU_GPO3 P1_2 15
D31 MIO34_PMU_GPO2 P1_3 16
D32 MIO33_PMU_GPO1 P1_4 17
D34 MIO32_PMU_GPO0 P1_5 18
Through the I2C0 bus U1 PS-side MIO[14:15] pins, the PMU has access to the board power
controller PMBus bus (IRPS5401_SDA/SCL) and power monitor PMbus ( INA226_PMBUS_SDA/
SCL). See Figure 7 for addional details.
See the Zynq UltraScale+ Device Technical Reference Manual (UG1085) for details about the PMU
interface.
The detailed RFSoC connecons for the feature described in this secon are documented in the
ZCU208 board XDC le, referenced in Appendix B: Xilinx Design Constraints.
SDIO (MIO 39-51)
A PS-side interface to an SD card connector is provided for boong and le system storage. This
interface is used for the SD boot mode and supports SD3.0 access post boot.
SD Card Interface
[Figure 2, callout 7]
The ZCU208 board includes a secure digital input/output (SDIO) interface to provide access to
general purpose non-volale SDIO memory cards and peripherals. Informaon for the SD I/O
card specicaon can be found on the SanDisk Corporaon or SD Associaon websites. The
ZCU208 SD card interface supports the SD1_LS conguraon boot mode documented in the
Zynq UltraScale+ Device Technical Reference Manual (UG1085).
Chapter 3: Board Component Descriptions
UG1410 (v1.0) July 8, 2020 www.xilinx.com
ZCU208 Board User Guide 36
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