Atmel ATtiny13A User Manual

75
8126F–AVR–05/12
ATtiny13A
11.9.4 OCR0A – Output Compare Register A
The Output Compare Register A contains an 8-bit value that is continuously compared with the
counter value (TCNT0). A match can be used to generate an Output Compare interrupt, or to
generate a waveform output on the OC0A pin.
11.9.5 OCR0B – Output Compare Register B
The Output Compare Register B contains an 8-bit value that is continuously compared with the
counter value (TCNT0). A match can be used to generate an Output Compare interrupt, or to
generate a waveform output on the OC0B pin.
11.9.6 TIMSK0 – Timer/Counter Interrupt Mask Register
• Bits 7:4, 0 – Res: Reserved Bits
These bits are reserved bits in the ATtiny13A and will always read as zero.
• Bit 3 – OCIE0B: Timer/Counter Output Compare Match B Interrupt Enable
When the OCIE0B bit is written to one, and the I-bit in the Status Register is set, the
Timer/Counter Compare Match B interrupt is enabled. The corresponding interrupt is executed if
a Compare Match in Timer/Counter occurs, i.e., when the OCF0B bit is set in the Timer/Counter
Interrupt Flag Register – TIFR0.
• Bit 2 – OCIE0A: Timer/Counter0 Output Compare Match A Interrupt Enable
When the OCIE0A bit is written to one, and the I-bit in the Status Register is set, the
Timer/Counter0 Compare Match A interrupt is enabled. The corresponding interrupt is executed
if a Compare Match in Timer/Counter0 occurs, i.e., when the OCF0A bit is set in the
Timer/Counter 0 Interrupt Flag Register – TIFR0.
• Bit 1 – TOIE0: Timer/Counter0 Overflow Interrupt Enable
When the TOIE0 bit is written to one, and the I-bit in the Status Register is set, the
Timer/Counter0 Overflow interrupt is enabled. The corresponding interrupt is executed if an
overflow in Timer/Counter0 occurs, i.e., when the TOV0 bit is set in the Timer/Counter 0 Inter-
rupt Flag Register – TIFR0.
Bit 76543210
0x36 OCR0A[7:0] OCR0A
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value00000000
Bit 76543210
0x29 OCR0B[7:0] OCR0B
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial Value00000000
Bit 76543210
0x39 ––––OCIE0BOCIE0ATOIE0–TIMSK0
Read/WriteRRRRR/WR/WR/WR
Initial Value00000000

Atmel ATtiny13A Specifications

General

Brand	Atmel
Model	ATtiny13A
Category	Microcontrollers
Language	English

Summary

Pin Configurations

ATtiny13A CPU Core

CPU Core Architectural Overview

ALU and Status Register

Description of the Arithmetic Logic Unit (ALU) and the Status Register.

General Purpose Register File

Reset and Interrupt Handling

How the microcontroller handles resets and interrupts for system control.

ATtiny13A Memories

Flash Program Memory

Details on the In-System Reprogrammable Flash Program Memory.

SRAM and EEPROM Data Memory

Description of SRAM and EEPROM data memory organization and features.

System Clock and Clock Options

Clock Systems and Distribution

Clock Sources and Prescaler

Details on available clock sources and the system clock prescaler.

Power Management and Sleep Modes

Sleep Modes Overview

Explanation of the different sleep modes available for power saving.

Software BOD Disable and Power Reduction

Methods for software control of Brown-out Detector and power reduction.

System Control and Reset

Resetting the AVR and Reset Sources

Details on resetting the AVR and the different reset sources.

Internal Voltage Reference and Watchdog Timer

Interrupts

Interrupt Vectors and External Interrupts

Details on interrupt vectors and external interrupt sources.

Interrupt Register Description

I/O Ports

I/O Ports Overview and General Digital I/O

Overview of I/O ports and their use as general digital inputs/outputs.

Alternate Port Functions and Register Description

8-bit Timer/Counter0 with PWM

Timer/Counter Features and Overview

Features and overview of the 8-bit Timer/Counter0 module with PWM support.

Clock Sources, Counter Unit, and Output Compare Unit

Details on clock sources, counter unit, and output compare functionality.

Compare Match Output Unit, Modes of Operation, and Timing Diagrams

How compare matches affect output, operational modes, and timing.

Timer/Counter Prescaler

Prescaler Overview, Reset, and External Clock

Analog Comparator

Analog Comparator Multiplexed Input and Register Description

Details on multiplexed inputs and register descriptions for the analog comparator.

Analog to Digital Converter (ADC)

ADC Features and Overview

ADC Operation and Conversion Start

Description of ADC operation and how to initiate a conversion.

ADC Prescaling, Timing, and Channel Selection

ADC Noise Canceling, Input, and Accuracy

ADC Conversion Result and Register Description

debugWIRE On-chip Debug System

debugWIRE Features, Overview, and Interface

Features, overview, and physical interface of the debugwire system.

Software Breakpoints, Limitations, and Registers

Self-Programming the Flash

Flash Programming Procedures

Programming Considerations and Time

Memory Programming

Program and Data Memory Lock Bits

Fuse Bytes

Calibration Bytes

Electrical Characteristics

Absolute Maximum Ratings and DC Characteristics

Defines the absolute maximum operating conditions and DC electrical parameters.

Speed, Clock, and System/Reset Characteristics

Analog Comparator and ADC Characteristics

Serial and High-voltage Programming Characteristics

Register Summary

Instruction Set Summary