Bridgetek FT801 - Display configuration and initialization

FT800 Series Programmer Guide
Version 2.1
Document Reference No.: BRT_000030 Clearance No.: BRT#037
12
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2.2 Display configuration and initialization
To configure the display, load the timing control registers with values for the particular
display. These registers control horizontal timing:
 REG_PCLK
 REG_PCLK_POL
 REG_HCYCLE
 REG_HOFFSET
 REG_HSIZE
 REG_HSYNC0
 REG_HSYNC1
These registers control vertical timing:
MPU
FT800
Custom
APP0
Graphics/GUI manager
Video Manager
Audio Manager
SPI/I2C Driver
Hardware
Custom
APP1
Custom
APP2
Host
software
stack
FT800 graphics
objects &
widgets to be
part of
graphics
manager
Figure 1: Software Architecture