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Bridgetek FT801 - Co-processor handling of Display list commands

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FT800 Series Programmer Guide
Version 2.1
Document Reference No.: BRT_000030 Clearance No.: BRT#037
146
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Document Feedback Copyright © Bridgetek Limited
5.1 Co-processor handling of Display list commands
Most co-processor engine commands write to the current display list. The current write
location in the display list is held in REG_CMD_DL. Whenever the co-processor engine
writes a word to the display list, it does so at REG_CMD_DL then increments
REG_CMD_DL. The special command CMD_DLSTART sets REG_CMD_DL to zero, for the
start of a new display list.
All display list commands can be written as co-processor engine commands. The co-
processor engine copies these commands into the current display list at REG_CMD_DL.
For example, this series of co-processor engine commands writes a small display list:
cmd(CMD_DLSTART); // start a new display list
cmd(CLEAR_COLOR_RGB(255, 100, 100)); // set clear color
cmd(CLEAR(1, 1, 1)); // clear screen
cmd(DISPLAY()); // display
Of course, this display list could have been written directly to RAM_DL. The advantage of
this technique is that you can mix low-level operations and high level co-processor
engine commands in a single stream:
cmd(CMD_DLSTART); // start a new display list
cmd(CLEAR_COLOR_RGB(255, 100, 100)); // set clear color
cmd(CLEAR(1, 1, 1)); // clear screen
cmd_button(20, 20, // x, y
60, 60, // width, height in pixels
30, // font 30
0, // default options
"OK!");
cmd(DISPLAY()); // display
5.2 Synchronization
At some points, it is necessary to wait until the co-processor engine has processed all
outstanding commands. When the co-processor engine completes the last outstanding
command in the command buffer, it raises the INT_CMDEMPTY interrupt. Another
approach is that the MCU can poll REG_CMD_READ until it is equal to REG_CMD_WRITE.
One situation that requires synchronization is to read the value of REG_CMD_DL, when
the MCU needs to do direct writes into the display list. In this situation the MCU should
wait until the co-processor engine is idle before reading REG_CMD_DL.

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