Compaq iPAQ 1.0 - Default Chapter; Table of Contents

Technical Reference Guide
Compaq iPAQ Series of Desktop Personal Computers
Second Edition - February 2001
iii
TABLE OF CONTENTS
CHAPTER 1 INTRODUCTION...................................................................................................................
1.1 ABOUT THIS GUIDE................................................................................................................ 1-1
1.1.1 USING THIS GUIDE.......................................................................................................... 1-1
1.2 ADDITIONAL INFORMATION SOURCES............................................................................. 1-2
1.3 MODEL NUMBERING CONVENTION................................................................................... 1-2
1.4 SERIAL NUMBER..................................................................................................................... 1-2
1.5 NOTATIONAL CONVENTIONS.............................................................................................. 1-3
1.5.1 VALUES ............................................................................................................................. 1-3
1.5.2 RANGES............................................................................................................................. 1-3
1.5.3 REGISTER NOTATION AND USAGE............................................................................. 1-3
1.5.4 BIT NOTATION AND BYTE VALUES............................................................................ 1-3
1.6 COMMON ACRONYMS AND ABBREVIATIONS................................................................. 1-4
CHAPTER 2 SYSTEM OVERVIEW...........................................................................................................
2.1 INTRODUCTION....................................................................................................................... 2-1
2.2 FEATURES AND OPTIONS...................................................................................................... 2-2
2.2.1 STANDARD FEATURES................................................................................................... 2-2
2.2.2 OPTIONS ............................................................................................................................ 2-3
2.3 MECHANICAL DESIGN ........................................................................................................... 2-4
2.3.1 CABINET LAYOUTS ........................................................................................................ 2-4
2.3.2 CHASSIS LAYOUTS ......................................................................................................... 2-6
2.3.3 SYSTEM BOARD LAYOUTS........................................................................................... 2-8
2.4 SYSTEM ARCHITECTURE.................................................................................................... 2-10
2.4.1 IPAQ 1.0/1.2 ARCHITECTURE....................................................................................... 2-10
2.4.2 IPAQ 2.0 ARCHITECTURE............................................................................................. 2-12
2.4.3 PROCESSORS.................................................................................................................. 2-14
2.4.4 CHIPSET........................................................................................................................... 2-16
2.4.5 SUPPORT COMPONENTS.............................................................................................. 2-17
2.4.6 SYSTEM MEMORY......................................................................................................... 2-17
2.4.7 MASS STORAGE............................................................................................................. 2-18
2.4.8 SERIAL AND PARALLEL INTERFACES...................................................................... 2-18
2.4.9 UNIVERSAL SERIAL BUS INTERFACE ...................................................................... 2-18
2.4.10 GRAPHICS SUBSYSTEM............................................................................................... 2-18
2.4.11 AUDIO SUBSYSTEM...................................................................................................... 2-19
2.5 SPECIFICATIONS ................................................................................................................... 2-19
CHAPTER 3 PROCESSOR/MEMORY SUBSYSTEM.............................................................................
3.1 INTRODUCTION....................................................................................................................... 3-1
3.2 PROCESSOR .............................................................................................................................. 3-2
3.2.1 CELERON PROCESSOR................................................................................................... 3-2
3.2.2 PENTIUM III PROCESSOR............................................................................................... 3-3
3.2.3 PROCESSOR UPGRADING.............................................................................................. 3-4
3.3 MEMORY SUBSYSTEM........................................................................................................... 3-5
3.4 SUBSYSTEM CONFIGURATION............................................................................................ 3-8