GE Versana Balance - Service Diagnostics

Network and Common Diagnostics
Versana Balance – Basic Service Manual System view 7-41
5808768-100 English Rev.9
7-6-3 Service Diagnostics
7-6-3-1 MST board
• MST Swept Demodulator Test performs a signal path test of
the swept demodulator FPGA on the MST.
• MST Front End Interface Test tests that the MST can access
Front-End boards.
• MST Analog Test.
• MST Memory Access Test tests that MST can access to the
internal, external, external cache memory spaces.
• Front End Interface FPGA Test reads the version of the GFE
FPGA.
• MST Fixed Demodulator Test: MST Fixed Demodulator
signal path test.
• DSP Master Clock Check checks DSP Master Clock.
• MST Swept Demodulator Long Test.
• MST Temperature Test.
• MST Voltage.
• FPGA Internal Memory Test.
NOTE: The FPGA Internal Memory test may fail if it is performed
with other tests at the same time.
• FPGA Version.
7-6-3-2 CWI board
• HV STOP Test tests HV-STOP mechanism and checks each
board is able to assert HV_STOP using its HV_STOP
source.
• CWI Voltage.
• Other Voltage test point.
• Memory tests the memory on the mother board.
• Network Interface.
• Network Interface Reliability Test.
• CPU Temperature Test.